vivado综合常见报错（持续更新）

[Synth 8-434] mixed level sensitive and edge triggered event controls are not supported for synthesis

错误原因:
一个触发器不能同时是边缘触发和电平触发的，因此不可被综合。所以最好统一，上图的情况可以去掉negedge。

IMPLEMENTATION报错

[Place 30-675] Sub-optimal placement for a global clock-capable IO pin and BUFG pair.If this sub optimal condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .xdc file to demote this message to a WARNING. However, the use of this override is highly discouraged. These examples can be used directly in the .xdc file to override this clock rule.
< set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets rst_IBUF_inst/O] >
rst_IBUF_inst/IBUFCTRL_INST