Create a module that implements a NOR gate. A NOR gate is an OR gate with its output inverted. A NOR function needs two operators when written in Verilog.
创建一个实现NOR门的模块。NOR门是输出反相的OR门。在Verilog中编写NOR函数时,需要两个运算符。
很贴心了,要两个运算符都告诉我了。
NOR gate 就是或非门
输入输出关系
输入a | 输入b | 输出out |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 0 |
module top_module(
input a,
input b,
output out );
assign out = ~(a||b);
endmodule
实际上就是或门加一个非就可以了