数字IC验证:System Verilog - 代码规范Coding Guidelines

写在前面:
本文为代码规范的整理精炼,内容来源:Verification Academy - SV/Guidelines

1 Genral Coding Style

1.1 Indent your code with spaces
1.2 Only one declaration or statement per line
1.3 Use a begin-end pair to bracket conditional statements
1.4 Use parenthesis in Boolean conditions
1.5 Keep your code simple
1.6 Keep your lines to a reasonable length
1.7 Use lowercase for names, using underscores to separate fields
1.8 Use prefix_ and _postfix to delineate name types
1.9 Use a descriptive typedef when declaring a variable instead of a built-in type
1.10 Use the end label for classes, functions, tasks, and packages
1.11 Comment the intent of your code

2 Class Names and Members

2.1 Name classes after the functionality they encapsulate
2.2 Private class members should have a m_prefix
2.3 Declare class methods using extern

3 Files and Directories

3.1 User lower case for file and directory names
3.2 Use .sv extensions for compile filrs, .svh for include files 3.3include .svh class files should only contain one class and be named after that class
3.4 Use decriptive names that reflect functionality
3.5 Only use `include to include a file in one place
3.6 Each package should have its own directory
3.7 Import packages to reference their contents
3.8 When compiling a package, use +incdir+ to reference its source directory

4 SystemVerilog Language Guidelines

4.1 Check that $cast() has succeeded
4.2 Check that randomize() has succeeded
4.3 Use if rather than assert to check the status of method calls
4.4 Do not place any code in $unit, place it in a package
4.5 Do not use associative arrays with a wildcard index[*]
4.6 Do not use #0 procedural delays
4.7 Avoid the use of the following language constructs: checker, final, program
4.8 Do not rely on static variable initialization order, initialize on first instance
4.9 Create covergroups within wrapper classes
4.10 Covergroup sampling should be conditional
4.11 Use the covergroup sample() method to collect coverage
4.12 Label coverpoints and crosses
4.13 Name your bins, do not rely on auto-naming
4.14 Minimize the size of the sample

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