VHDL表达式（Expressions）

VHDL表达式（Expressions）

VHDL表达式和其他编程语言类似。一个表达式就是一个包含操作数和操作符的公式。
VHDL expressions are much like expressions in other programming languages. An expression is a formula combining primaries with operators.

特殊运算符或表达式有：
Special operators or expressions are:

• 运算符重载 Operator overloading
• 合集 Aggregate
• 函数调用 Function call
• 类型转换 Type conversion

表达式（Expression）

表达式为数值运算公式。
A formula that defines the computation of a value.

语法（Syntax）

expression operator expression | operator expression

expression = name | number | character | string | function_call | 
    physical_literal | aggregate | new | qualified_expression

说明（Description）

表达式定义了数值计算方法。包含操作数和操作符。每个操作数都有一个数值和类型，表达式结果的类型取决于操作数的类型和运算符。运算符按照语言定义的优先级顺序运算。
Expressions define the way in which values are computed. They consist of operands and operators. Each operand has a value and a type and the type of the result of the expression depends on the types of operands and the operation. The order in which the operations are performed depends on the priorities of the operators in the language (see Operator).

运算符优先级为：
Operators are evaluated in the following order:

• 1st: ** abs not
• 2nd: * / mod rem
• 3rd: + - &
• 4th: sll srl sla sra rol ror
  5th: = /= < <= > >=
  6th: and or xor nand nor xnor

例程（Example）

C := A nand B ; 
A := '1' and (B and (C or D)); 
B := a * (abs b) + 10 <= 128;

注释（Notes）

• 在每个表达式中，运算符为特定的操作数而定义。
• Operators are defined for particular types of operands and this must be reflected in each expression.
• 只要类型正确，不同的运算符可以在同一个表达式中混合使用。
• Different operators can be mixed in one expression as long as the
  operands are of correct (for each individual operator) type.

运算符（Operator）

运算符为表达式的一部分。
Operators are means for constructing expressions.

语法（Syntax）

-- 双目运算符（表达式 运算符 表达式）
+   -   *   /   mod   rem   **
=   /=   <   <=   >   >=
and   or   xor   nand   nor   xnor
sll   srl   sla   sra   rol   ror
&

-- 单目运算符（运算符 表达式）
+   -   abs   not

-- expression operator expression
+   -   *   /   mod   rem   **
=   /=   <   <=   >   >=
and   or   xor   nand   nor   xnor
sll   srl   sla   sra   rol   ror
&

-- operator expression
+   -   abs   not

说明（Description）

运算符是一个逻辑或者数学函数，用来计算一个或两个值来生一个结果。运算符可以被重定义成其他任何类型，并赋予新函数。
An operator is a logical or mathematical function which takes one or two values and produces a single result. Operators can be redefined (see Operator overloading) for any types by writing new functions.

表1.运算优先级：
Table 1. Operator priority

---

• 混合运算符 （miscellaneous operators）： ** | abs | not
• 求积运算符（multiplying operators）： * | / | mod | rem
• 符号运算符（sign operators）： + | -
• 加法运算符（adding operators）： + | - | &
• 移位运算符（shift operators）： sll | srl | sla | sra | rol | ror
• 关系运算符（relational operators）： = | \= | < | <= | > | >=
• 逻辑运算符（logical operators）： and | or | nand | nor | xor | xnor

---

表达式按照优先级不同从左到计算。可以使用小括号来改变计算顺序。
The expressions are evaluated form left to right, operations with higher precedence are evaluated first. If the order should be different from the one resulting from this rule, parentheses can be used.

运算符（+ - = /= < <= > >=）被综合为加法器，减法器和比较器。
The operators + - = /= < <= > >= are synthesizable as adders, substractors and comparators

运算符（/ mod rem **）一般不被综合。
The operators / mod rem ** are not synthesizable in general.

例程（Example）

V := A + B * C;
W := W1 and W2 xnor W3 nor W4; 
X sll 3      
Y := A / (not B) 
Z:= B mod 2 

注释（Notes）

• 所有标准类型的预定义运算符都在已标准包中声明。

• All predefined operators for standard types are declared in the
  package Standard.

• 为了定义过程的目的，运算符 not 被划分为混合运算符。否则，被当做逻辑运算符来处理。

• The operator not is classified as a miscellaneous operator only for
  the purpose of defining precedence. Otherwise, it is classified as a
  logical operator.

运算符重载（Operator Overloading）

运算符重载是一个函数声明，只不过他的指定者为运算符号。
Operator overloading is a declaration of a function whose designator is an operator symbol.

说明（Description）

如果一个运算符在处理不同类型的数据时，运算结果类型也不同，则称为运算符重载。VHDL允许定义和预定义运算符重名的运算符，但是操作数类型要不同。两者都可以存在，可以为用户提供更好的通用性。
The operator is called overloaded if there is more than one function specifying it for different data and result types. VHDL allows defining operators of the same names as predefined operators, but for different operand types. Both can exist together in one specification, offering greater versatility to the user.
所有综合工具提供了一个包，包含了重载了的运算符和函数。典型的如运算符（+ - = /= < <= > >=）在std_logic_vector中的类型重载。
All synthesis tools provide a package which contains overloaded operators and functions. Typically they include the operators + - = /= < <= > >= which are overloaded on type std_logic_vector.

例程（Example）

type NewType is ('0', '1', 'Z', 'X');
function "nand" (Left, Right: NewType) return NewType;
function "or" (Left, Right: NewType) return NewType; 
signal A, B, C: NewType;
C <= (A nand B) or 'X';

集合（Aggregate）

集合是一个基本运算，将一个或多个值组合成一个记录或数组类型的混合值。
A basic operation that combines one or more values into a composite value of a record or array type.

语法（Syntax）

( [ choices => ] expression, ... ) 
choices = choice | ... 
choice = constant_expression | range | others   -- the last choice

说明（Description）

集合表达式将一个或多个值赋给记录或数组的元素来创建一个该类型的混合值。集合是元素赋值的集合，即赋值给元素。元素赋值用括号包围，已逗号分隔开。
The aggregate assigns one or more values to the elements of a record or array creating the composite value of this type. Aggregates are composed of element associations, which associate expressions to elements (one expression per one or more elements). Element associations are specified in parentheses and are separated by commas.
赋给元素的值必须和元素的类型相同。
An expression assigned to an element or elements must be of the same type as the element(s).
元素引用可以按位置，按名也可以两者混用。无论在任何情况下，others 赋值都要在集合的末尾。
Elements can be referred to either using positional assocation (an ordered list), named association (explicitly identifying each element by name) or a combination of both. In any case if the association others is used, it must be the last one in an aggregate.
选择元素的格式可以是：简单表达式，离散范围，简单名或保留字others。
The choice clause, denoting selection of element(s) can have any of the following forms: simple expression, discrete range, simple name or reserved word others.
集合中（others => 表达式）用来给数组的所有元素赋相同值；而不用直到数组的大小。
The aggregate (others => expression) is a useful way of setting all the elements of an array to the same value; it’s not necessary to know the size of the array.

例程（Example）

(1, 2, 3, 4) 
(A => 1, B => 3, C => 5, D => 7) 
(1, 2, D => 7, C => 5) 
(1, 2, others => 0)

注释（Notes）

• 许多综合工具不允许集合作为作业的目标。
• Many synthesis tools do not allow aggregates as targets of assignments.
• 只有一个元素赋值的集合通常使用按名赋值，用来区分括号表达式。
• Aggregates containing the single element association must always be specified using named association in order to distinguish them from parenthesized expressions.
• others 选项只能在集合的结尾。
• The others choice can be only the last in an aggregate.

函数调用（Function Call）

函数调用用来调用一个有返回值的函数。
A function call calls a function which returns a value.

语法（Syntax）

function_name [ ( [ parameter => ] expression, ... ) ]

说明（Description）

函数的参数表可以按位置也可以按名传递。两种方法也可以在同一函数中混用（然而位置传参必须在名字传参前）。
The function parameters can be listed in both positional association and named association. Both methods can be mixed in one function call (although positional association must come before named association).
建议使用按名传参来增强可读性，并减少出现错误的风险。
Named associated is advised to improve readability and reduce the risk of making mistakes.

例程（Example）

A:= to_std_logic_vector (J, 4);
B:= "+"(L => M, R => N);          -- equivalent to B:= M + N

注释（Notes）

• 运算符调用时，可以写成操作数加运算符加操作数（如A+B），或者写成函数调用方式（如“+”（A，B））。
• Operators can be called by writing the operator symbol between the operands (e.g. A + B) or by using the function call syntax (e.g.
  “+”(A, B)).

类型转换（Type Conversion）

表达式可以将子表达式的值从一个类型转换为类型转换表达式指定的类型。
An expression that converts the value of a sub expression from one type to the designated type of the type conversion.

语法（Syntax）

类型名 ( 表达式 ) 

type_name ( expression ) 

说明（Description）

VHDL时强类型语言。所以当需要同时使用两个紧密联系类型的对象时，需要进行类型转换。
VHDL is a strongly typed language. This causes that objects of even closely related types need a conversion, if they are supposed to be used together.
对象类型转换后的类型是用类型名（type_name）指定的类型。表达式的类型可以有上下文获得。然而表达式不能是集合，分配算符，null字符或字符串。
The result of the conversion is an object, which type is the same as the type specified by the type_name. The type of the expression must be known independently from the context. Moreover, the expression cannot be an aggregate, an allocator, the literal null, or a string literal.
类型名必须是整型，浮点型或数组类型。
The type_name must be the name of an Integer, Floating or Array-type.
当浮点型数字转换为整型时，结果是浮点值最近似整数。
When a floating-point number is converted into an Integer, the result is rounded to the nearest Integer.
类型转换和转换函数不同。类型转换仅隐式定义为紧密联系类型服务。对于其他类型，就需要编写转换函数。
Type conversions and conversion functions are different things. Type conversions are only defined implicitly for closely related types. For other types, you must write explicit conversion functions.

例程（Example）

signal SInt: integer; 
signal SReal: real; 
... 
SReal <= real(SInt) * 4.0; 

注释（Notes）

• 根据子类型的定义，类型和子类型间不需要转换。
• No conversion is needed between any type or subtype defined on its basis.