【嵌入式Linux】jetson nano设备树裁剪到最简

最新推荐文章于 2024-06-20 14:56:40 发布
最新推荐文章于 2024-06-20 14:56:40 发布
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四、裁剪到最简

官方内核中发布的复制一份改成自己用的最简的

image-20220916072052562

裁剪到支持RAMDISK

1.板子的描述

arch/arm64/boot/dts/nvidia/board.dts

//arch/arm64/boot/dts/nvidia/board.dts	
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/mfd/max77620.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>

#include "cpu.dtsi"

/ {
	model = "Google Pixel C";
	compatible = "nvidia,tegra210";

	aliases {
	    serial0 = &uarta;
	};
	chosen {
	    bootargs = "earlycon";
	    stdout-path = "serial0:115200n8";
	};
	memory {
	    device_type = "memory";
	    reg = <0x0 0x80000000 0x0 0xc0000000>;
	};    
	serial@70006000 {
	  status = "okay";
	};
	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg = <0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};
};
2.CPU的描述

arch/arm64/boot/dts/nvidia/cpu.dtsi

//arch/arm64/boot/dts/nvidia/cpu.dtsi
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/memory/tegra210-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>

/ {
	compatible = "nvidia,tegra210";
	interrupt-parent = <&lic>;
	#address-cells = <2>;
	#size-cells = <2>;

	gic: interrupt-controller@50041000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x50041000 0x0 0x1000>,
		      <0x0 0x50042000 0x0 0x2000>,
		      <0x0 0x50044000 0x0 0x2000>,
		      <0x0 0x50046000 0x0 0x2000>;
		interrupts = <GIC_PPI 9
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
		interrupt-parent = <&gic>;
	};

	lic: interrupt-controller@60004000 {
		compatible = "nvidia,tegra210-ictlr";
		reg = <0x0 0x60004000 0x0 0x40>, /* primary controller */
		      <0x0 0x60004100 0x0 0x40>, /* secondary controller */
		      <0x0 0x60004200 0x0 0x40>, /* tertiary controller */
		      <0x0 0x60004300 0x0 0x40>, /* quaternary controller */
		      <0x0 0x60004400 0x0 0x40>, /* quinary controller */
		      <0x0 0x60004500 0x0 0x40>; /* senary controller */
		interrupt-controller;
		#interrupt-cells = <3>;
		interrupt-parent = <&gic>;
	};

	tegra_car: clock@60006000 {
		compatible = "nvidia,tegra210-car";
		reg = <0x0 0x60006000 0x0 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};
    
#if 1
	apbdma: dma@60020000 {
		compatible = "nvidia,tegra210-apbdma", "nvidia,tegra148-apbdma";
		reg = <0x0 0x60020000 0x0 0x1400>;
		interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_APBDMA>;
		clock-names = "dma";
		resets = <&tegra_car 34>;
		reset-names = "dma";
		#dma-cells = <1>;
	};

#endif
#if 1
	apbmisc@70000800 {
		compatible = "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc";
		reg = <0x0 0x70000800 0x0 0x64>,   /* Chip revision */
		      <0x0 0x7000e864 0x0 0x04>;   /* Strapping options */
	};
#endif

	uarta: serial@70006000 {
		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
		reg = <0x0 0x70006000 0x0 0x40>;
		reg-shift = <2>;
		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_UARTA>;
		clock-names = "serial";
		resets = <&tegra_car 6>;
		reset-names = "serial";
#if 1
		dmas = <&apbdma 8>, <&apbdma 8>;
		dma-names = "rx", "tx";
#endif
		status = "disabled";
	};

	pmc: pmc@7000e400 {
		compatible = "nvidia,tegra210-pmc";
		reg = <0x0 0x7000e400 0x0 0x400>;
		clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
		clock-names = "pclk", "clk32k_in";
#if 1
		powergates {
			pd_audio: aud {
				clocks = <&tegra_car TEGRA210_CLK_APE>,
					 <&tegra_car TEGRA210_CLK_APB2APE>;
				resets = <&tegra_car 198>;
				#power-domain-cells = <0>;
			};

			pd_sor: sor {
				clocks = <&tegra_car TEGRA210_CLK_SOR0>,
					 <&tegra_car TEGRA210_CLK_SOR1>,
					 <&tegra_car TEGRA210_CLK_CSI>,
					 <&tegra_car TEGRA210_CLK_DSIA>,
					 <&tegra_car TEGRA210_CLK_DSIB>,
					 <&tegra_car TEGRA210_CLK_DPAUX>,
					 <&tegra_car TEGRA210_CLK_DPAUX1>,
					 <&tegra_car TEGRA210_CLK_MIPI_CAL>;
				resets = <&tegra_car TEGRA210_CLK_SOR0>,
					 <&tegra_car TEGRA210_CLK_SOR1>,
					 <&tegra_car TEGRA210_CLK_CSI>,
					 <&tegra_car TEGRA210_CLK_DSIA>,
					 <&tegra_car TEGRA210_CLK_DSIB>,
					 <&tegra_car TEGRA210_CLK_DPAUX>,
					 <&tegra_car TEGRA210_CLK_DPAUX1>,
					 <&tegra_car TEGRA210_CLK_MIPI_CAL>;
				#power-domain-cells = <0>;
			};

			pd_xusbss: xusba {
				clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
				resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
				#power-domain-cells = <0>;
			};

			pd_xusbdev: xusbb {
				clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
				resets = <&tegra_car 95>;
				#power-domain-cells = <0>;
			};

			pd_xusbhost: xusbc {
				clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
				resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
				#power-domain-cells = <0>;
			};
		};
#endif
	};

	cpus {
		#address-cells = <1>;
        #size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <1>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <2>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <3>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&gic>;
	};

};
3.运行
//用条件编译来裁剪
#if 0  
#endif 

//编译运行
$ make dtbs //编译后重启
# setenv bootargs //清除bootargs,使用设备树里chosen指定的
# setenv yhai_bootcmd  ext4load mmc 1:1 0x84000000 /home/yhbd/Image \; ext4load mmc 1:1 83100000	 /home/yhbd/linux-4.9.307/arch/arm64/boot/dts/nvidia/board.dtb \; ext4load mmc 1:1  0xa0000000 /home/yhbd/ramdisk.img.gz \; booti 0x84000000 - 83100000
# saveneenv
# mw  83100000  0  50 
# run  yhai_bootcmd //发现串口能正常输出信息

裁剪到支持串口输出

把RAMDISK去掉

1.板子的描述
//arch/arm64/boot/dts/nvidia/board.dts		
/dts-v1/;
#include "cpu.dtsi"

/ {
    model = "Google Pixel C";
    compatible = "nvidia,tegra210";

    aliases {
        serial0 = &uarta;
    };
    chosen {
        bootargs = "earlycon";
        stdout-path = "serial0:115200n8";
    };
    memory {
        device_type = "memory";
        reg = <0x0 0x80000000 0x0 0xc0000000>;
    };    
    serial@70006000 {
	status = "okay";  //打开uarta
    };
};
2.CPU的描述
//arch/arm64/boot/dts/nvidia/cpu.dtsi 
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "nvidia,tegra210";
	interrupt-parent = <&lic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <1>;
		};
	};

	gic: interrupt-controller@50041000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x50041000 0x0 0x1000>,
		      <0x0 0x50042000 0x0 0x2000>,
		      <0x0 0x50044000 0x0 0x2000>,
		      <0x0 0x50046000 0x0 0x2000>;
		interrupts = <GIC_PPI 9
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
		interrupt-parent = <&gic>;
	};

	tegra_car: clock@60006000 {
		compatible = "nvidia,tegra210-car";
		reg = <0x0 0x60006000 0x0 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	pmc: pmc@7000e400 {
		compatible = "nvidia,tegra210-pmc";
		reg = <0x0 0x7000e400 0x0 0x400>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&gic>;
	};

	uarta: serial@70006000 {
		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
		reg = <0x0 0x70006000 0x0 0x40>;
		reg-shift = <2>;
		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_UARTA>;
		clock-names = "serial";
		resets = <&tegra_car 6>;
		reset-names = "serial";
		status = "disabled";  //默认关闭uarta
	};

};

合并成一个文件

//arch/arm64/boot/dts/board.dts	  
/dts-v1/;
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/dts-v1/;
/ {
	model = "yhai jetson nano";
	compatible = "yhai,tegra210";
	#address-cells = <2>;
	#size-cells = <2>;
	cpus {
	    #address-cells = <1>;
	    #size-cells = <0>;
	    cpu@0 {
	        device_type = "cpu";
	        compatible = "arm,cortex-a57";
	        reg = <0>;
	    };   

	    cpu@1 {
	        device_type = "cpu";
	        compatible = "arm,cortex-a57";
	        reg = <1>;
	    };
	               
	};      

	chosen {
	    bootargs = "earlycon";
	    stdout-path = "serial0:115200n8";
	};

	memory {
	    device_type = "memory";
	    reg = <0x0 0x80000000 0x0 0xc0000000>;
	};    

	gic: interrupt-controller@50041000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x50041000 0x0 0x1000>,
		      <0x0 0x50042000 0x0 0x2000>,
		      <0x0 0x50044000 0x0 0x2000>,
		      <0x0 0x50046000 0x0 0x2000>;
		interrupts = <GIC_PPI 9
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
		interrupt-parent = <&gic>;
	};

	tegra_car: clock@60006000 {
		compatible = "nvidia,tegra210-car";
		reg = <0x0 0x60006000 0x0 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&gic>;
	};

	pmc: pmc@7000e400 {
		compatible = "nvidia,tegra210-pmc";
		reg = <0x0 0x7000e400 0x0 0x400>;
	};

	aliases {
	    serial0 = &uarta;
	};

	uarta: serial@70006000 {
		compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
		reg = <0x0 0x70006000 0x0 0x40>;
		reg-shift = <2>;
		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_UARTA>;
		clock-names = "serial";
		resets = <&tegra_car 6>;
		reset-names = "serial";
		status = "okay";
	};

};
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Jetson Nano是一款由NVIDIA公司推出的高性能、低功耗的人工智能开发板，它专为嵌入式AI应用设计，广泛应用于机器人、自动驾驶、边缘计算等领域。本压缩包中的"Jetson_Nano开发板原理图.pdf"是关于该开发板的详细电路...
嵌入式linux系统裁剪
weixin_33725239的博客
05-12 511
花了几天的时间，终于把系统从近200 MB裁到小于16 MB， 虽然现在看来过程非常简单，对于最初的那点恐惧觉得有点可笑。在这里把主要心得写一下，总结一下心得， 希望可以给相关人员一点参考。 主要步骤如下： 1. 充分了解系统 这有点像废话，但是确实很重要，特别对不是自己负责的模块，需要花点时间去在调研。最初觉得不好下手是没有对系统进行足够的了...
蓝迪哥教你：嵌入式linux内核裁剪的具体过程和方法
landyjzlai的博客
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嵌入式linux内核裁剪的具体过程和方法
【嵌入式Linux内核驱动】04_Jetson nano GPIO应用 | 驱动开发 | 官方gpiolib、设备树与chip_driver
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Jetson nano GPIO子系统
【去后厂村摆摊吧】基于Jeston Nano部署（可用PC代替）的实时预览美甲机
m0_63642362的博客
10-07 879
【创造营第三期项目】本项目基于Jeston Nano（可用PC代替），对摄像头画面进行实时渲染，展示手指做过美甲的样子，支持纯色/自选图案美甲~涵盖了...实在写不下了，反正很多很多
TX2 NX 修改设备树--GPIO
weixin_42564775的博客
08-12 355
最终生成出tegra186-mb1-bct-pinmux-p3636-0001-a00.cfg文件和tegra186-mb1-bct-pad-p3636-0001-a00.cfg文件。注意：指令里面的文件名称要与生成出的设备树名称一致，.cfg文件要与要替换的文件名称一致。
ubuntu 下jetson nano编译内核、系统烧录、内核裁剪
嵌入式开发记录
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一、内核编译 jetson nano 的内核编译踩了不少坑，记录一下： 步骤如下： 1.下载交叉编译工具 这里的网址来自官网，可以会更新，如果下载不了，需要去官网下载。 /home$ wgethttp://releases.linaro.org/components/toolchain/binaries/7.3-2018.05/aarch64-linux-gnu/gcc-linaro-7.3.1-2018.05-x86_64_aarch64-linux-gnu.tar.xz 2.解压工具 可.
NVIDIA Jetson Nano 4GB 开发板启动问题及解决方案
NVIDIA Jetson Nano是一款面向AI开发者、学生和爱好者的小型计算机，特别适合于搭建嵌入式AI系统和智能机器人。在初次使用时，用户需确保具备必要的配件，包括一个至少16GB UHS-1的microSD卡、USB键盘和鼠标、支持...
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