1.并转串
module b2c(clk,ain,rst,bout,load,ready);//并转串
input clk,rst,load;
input [7:0] ain;
output reg bout;
output reg ready;
reg [7:0] temp;
always @(posedge clk or posedge rst)
begin
if(rst)
begin
temp<=8'dx;
bout<=1'bx;
ready=1'b1;//复位时可以接收输入数据
end
else
begin
if(load && ready)//置数
begin
temp<=ain;
end
if(temp[7]||!temp[7])//temp[7]有数
begin
bout<=temp[7];//输出由temp[7]决定,每次左移1位,并且在最低位补x
temp<={temp[6:0],1'bx};
ready<=1'b0;
end
else
begin
ready<=1'b1;
bout<=1'bx;
end
end
end
endmodule
另一种计数器方法:
module b2c(clk,din,rst,ordy,bout);
input clk,rst;
input [3:0] din;
output bout;
output reg ordy;
reg [1:0] count;
reg [3:0] temp;
reg ready;
always @(posedge clk)
begin
if(rst)
begin
count <= 0;
temp <= 0;
// bout <= 0;
ordy <= 0;
ready <= 1;//开始置数
end
else
begin
if(ready)
begin
temp <= din;//置数,同时计数归零
ready <= 0;
count <= 0;
end
else
begin
temp <= {temp[2:0],1'bx};//左移
count <= count + 1'b1;
if(count < 3)
begin
ordy <= 1;
end
else
begin
ordy <= 0;
ready <= 1;
end
end
end
end
assign bout = temp[3];
endmodule
2.串转并
module b2c(clk,ain,rst,bout,load,ready);//并转串
input clk,rst,load;
input [7:0] ain;
output reg bout;
output reg ready;
reg [7:0] temp;
always @(posedge clk or posedge rst)
begin
if(rst)
begin
temp<=8'dx;
bout<=1'bx;
ready=1'b1;//复位时可以接收输入数据
end
else
begin
if(load && ready)//置数
begin
temp<=ain;
end
if(temp[7]||!temp[7])//temp[7]有数
begin
bout<=temp[7];//输出由temp[7]决定,每次左移1位,并且在最低位补x
temp<={temp[6:0],1'bx};
ready<=1'b0;
end
else
begin
ready<=1'b1;
bout<=1'bx;
end
end
end
endmodule
另一种计数器方法:
module c2b(clk,ain,rst,bout,ready);//串转并
input clk,rst;
input ain;
output [3:0] bout;
output reg ready;
reg [3:0] temp;
reg [1:0] count;
always @(posedge clk)
begin
if(rst)
begin
temp <= 4'dx;
count <= 0;
ready <= 0;
end
else
begin
temp <= {temp[2:0],ain};//左移
count <= count + 1'd1;
if(count == 3)
begin
ready <= 1;
end
else
begin
ready <= 0;
end
end
end
assign bout = temp;
endmodule