Purpose of ‘HOLD#’ Function in Cypress SPI NOR FLASH Memory Products - KBA229044

原文链接：https://community.infineon.com/t5/Knowledge-Base-Articles/Purpose-of-HOLD-Function-in-Cypress-SPI-NOR-FLASH-Memory/ta-p/258372

Author: AlbertB_56 Version: **

Translation - Japanese: サイプレスSPI NORフラッシュメモリ製品の「HOLD＃」機能の目的 - KBA229044 - Community Translated (JA)

The purpose of the ‘HOLD#’ function is to pause any serial communications between the SPI Flash memory device and the system microcontroller, without having to deselect the SPI Flash, or stop the SCLK. The HOLD function is especially useful when multiple devices share the same SPI I/O bus. However, it is important to highlight that the logic state of the SPI interface remains undisturbed, as long as CS# remains active LOW during the entire HOLD condition. During the active HOLD condition, any embedded operation (PROGRAM or ERASE) that may currently be in progress will not be terminated.

It is also important to highlight that the HOLD# function is not available when the SPI Flash is configured in Quad Mode (CR1[1] = 1), because the HOLD function is replaced by IO3 for input and output of addresses and data, respectively, during Quad mode.

The HOLD function is not to be confused with PROGRAM Suspend or ERASE Suspend operation. PROGRAM and ERASE Suspend allow the system to interrupt a program or erase operation and enables the READ operation from any ‘non-program-suspend’ sector or

‘non-erase-suspend’ sector. The HOLD function is an input-signal generated function, whereas the PROGRAM Suspend or ERASE Suspend functions are command generated operation, and are valid only during a program or erase operation.

To initiate the HOLD condition, the device must be selected by driving the CS# input LOW. It is recommended that you keep the CS# input LOW during the entire duration of the Hold condition. This is to ensure that the state of the interface logic remains unchanged from the moment of entering the Hold condition.

If the CS# input is driven HIGH while the device is in the Hold condition, the interface logic of the device will be reset. The Hold condition starts on the falling edge of the Hold (HOLD#) signal, provided that this coincides with SCK being LOW. If the falling edge does not coincide with the SCK signal being LOW, the Hold condition starts whenever the SCK signal reaches LOW.

The Hold condition terminates on the rising edge of the Hold (HOLD#) signal, provided that this coincides with the SCK signal being LOW. If the rising edge does not coincide with the SCK signal being LOW, the Hold condition terminates

whenever the SCK signal reaches LOW.

Not all Cypress SPI NOR FLASH memory products have the HOLD function. See the respective SPI device datasheet for specific details.

Reference (pg. 10) : S25FL128S/FL256S datasheet