HDLBits刷题之Circuits-＞Combinational Logic-＞Arithmetic Circuits

Hadd

Create a half adder. A half adder adds two bits (with no carry-in) and produces a sum and carry-out.

Expected solution length: Around 2 lines.

Write your solution here

module top_module( 
    input a, b,
    output cout, sum );

    assign {cout,sum} = a+b;
    
endmodule

Fadd

Create a full adder. A full adder adds three bits (including carry-in) and produces a sum and carry-out.

Expected solution length: Around 2 lines.

Write your solution here

module top_module( 
    input a, b, cin,
    output cout, sum );

    assign {cout,sum} = a+b+cin;
    
endmodule

Adder3

Now that you know how to build a full adder, make 3 instances of it to create a 3-bit binary ripple-carry adder. The adder adds two 3-bit numbers and a carry-in to produce a 3-bit sum and carry out. To encourage you to actually instantiate full adders, also output the carry-out from each full adder in the ripple-carry adder. cout[2] is the final carry-out from the last full adder, and is the carry-out you usually see.

Write your solution here

module top_module( 
    input [2:0] a, b,
    input cin,
    output [2:0] cout,
    output [2:0] sum );

    full_adder instance1(a[0],b[0],cin,cout[0],sum[0]);
    full_adder instance2(a[1],b[1],cout[0],cout[1],sum[1]);
    full_adder instance3(a[2],b[2],cout[1],cout[2],sum[2]);
    
endmodule

module full_adder( 
    input a, b, cin,
    output cout, sum );
    
    assign {cout,sum} = a+b+cin;

endmodule

Exams/m2014 q4j

Implement the following circuit:

("FA" is a full adder)

Write your solution here

module top_module (
    input [3:0] x,
    input [3:0] y, 
    output [4:0] sum);

    wire cout1,cout2,cout3;
    FA inst1(x[0],y[0],0,cout1,sum[0]);
    FA inst2(x[1],y[1],cout1,cout2,sum[1]);
    FA inst3(x[2],y[2],cout2,cout3,sum[2]);
    FA inst4(x[3],y[3],cout3,sum[4],sum[3]);
    
endmodule

module FA( 
    input a, b, cin,
    output cout, sum );
    
    assign {cout,sum} = a+b+cin;
    
endmodule

 Exams/ece241 2014 q1c

 Assume that you have two 8-bit 2's complement numbers, a[7:0] and b[7:0]. These numbers are added to produce s[7:0]. Also compute whether a (signed) overflow has occurred.

Write your solution here

module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
); //
 
     assign s = a+b;
    //两个数的补码相加，符号位参加运算，且两数和的补码等于两数的补码之和。
    
    //真值表得出  a  b  s  overflow
    //          0  0  1     1
    //          1  1  0     1
    assign overflow = a[7]&b[7]&(~s[7]) | (~a[7])&(~b[7])&s[7];
    //单符号——两符号相同的运算，运算结果符号相反的为溢出。
    //双符号法(变形补码法)——检测正负溢出

endmodule

Adder100

Create a 100-bit binary adder. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out.

Expected solution length: Around 1 line.

Write your solution here

module top_module( 
    input [99:0] a, b,
    input cin,
    output cout,
    output [99:0] sum );

    wire [99:0] cout1;
    
    generate
        genvar i;
        for(i=0;i<100;i++) begin:full_adder
            if(i==0)
                full_adder inst1(a[0],b[0],cin,cout1[0],sum[0]);
        	else
                full_adder insti(a[i],b[i],cout1[i-1],cout1[i],sum[i]);
        end
    endgenerate
    assign cout = cout1[99];
    
endmodule

module full_adder(input a,b,sin,
                  output cout,sum);
    assign {cout,sum} = a+b+sin;
endmodule

Bcdadd4

You are provided with a BCD (binary-coded decimal) one-digit adder named bcd_fadd that adds two BCD digits and carry-in, and produces a sum and carry-out.

module bcd_fadd (
    input [3:0] a,
    input [3:0] b,
    input     cin,
    output   cout,
    output [3:0] sum );

Instantiate 4 copies of bcd_fadd to create a 4-digit BCD ripple-carry adder. Your adder should add two 4-digit BCD numbers (packed into 16-bit vectors) and a carry-in to produce a 4-digit sum and carry out.

Write your solution here

module top_module ( 
    input [15:0] a, b,
    input cin,
    output cout,
    output [15:0] sum );

    wire cout1,cout2,cout3;
    bcd_fadd inst1(a[3:0],b[3:0],cin,cout1,sum[3:0]);
    bcd_fadd inst2(a[7:4],b[7:4],cout1,cout2,sum[7:4]);
    bcd_fadd inst3(a[11:8],b[11:8],cout2,cout3,sum[11:8]);
    bcd_fadd inst4(a[15:12],b[15:12],cout3,cout,sum[15:12]);
    
endmodule