Verilog练习:HDLBits笔记9

三、Circuits

Combinational logic-Arithmetic Circuits

1、Half adder

Problem Statement:

Create a half adder. A half adder adds two bits (with no carry-in) and produces a sum and carry-out.

module top_module( 
    input a, b,
    output cout, sum 
);
    assign sum  = a ^ b;
    assign cout = a & b;

endmodule

 2、Full adder

Problem Statement:

Create a full adder. A full adder adds three bits (including carry-in) and produces a sum and carry-out.

module top_module( 
    input a, b, cin,
    output cout, sum 
);
    assign sum = a ^ b ^ cin;
    assign cout = a & b | a & cin | b & cin;

endmodule

 3、3-bit binary adder

Problem Statement:

Now that you know how to build a full adder, make 3 instances of it to create a 3-bit binary ripple-carry adder. The adder adds two 3-bit numbers and a carry-in to produce a 3-bit sum and carry out. To encourage you to actually instantiate full adders, also output the carry-out from each full adder in the ripple-carry adder. cout[2] is the final carry-out from the last full adder, and is the carry-out you usually see.

module top_module( 
    input [2:0] a, b,
    input cin,
    output [2:0] cout,
    output [2:0] sum 
);
    
    full_adder instance1(.a(a[0]), .b(b[0]), .cin(cin), .cout(cout[0]), .sum(sum[0]));
    full_adder instance2(.a(a[1]), .b(b[1]), .cin(cout[0]), .cout(cout[1]), .sum(sum[1]));
    full_adder instance3(.a(a[2]), .b(b[2]), .cin(cout[1]), .cout(cout[2]), .sum(sum[2]));     
    
endmodule

module full_adder(
    input a, b, cin,
    output cout, sum 
);
    assign sum = a ^ b ^ cin;
    assign cout = a & b | a & cin | b & cin;

endmodule

4、Adder

Problem Statement:

Implement the following circuit:

Exams m2014q4j.png

module top_module (
    input [3:0] x,
    input [3:0] y, 
    output [4:0] sum
);

    assign sum = x + y; //?
    
endmodule

5、Signed addition overflow

Problem Statement:

Assume that you have two 8-bit 2's complement numbers, a[7:0] and b[7:0]. These numbers are added to produce s[7:0]. Also compute whether a (signed) overflow has occurred.

module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
); 
 
	assign s = a + b;
    assign overflow = (a[7] & b[7] & ~s[7]) | (~a[7] & ~b[7] & s[7]);

endmodule

 6、100-bit binary adder 

Problem Statement:

Create a 100-bit binary adder. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out.

module top_module( 
    input [99:0] a, b,
    input cin,
    output cout,
    output [99:0] sum 
);
    assign {cout, sum} = a + b  + cin;


endmodule

 7、4-bit BCD adder 

Problem Statement:

You are provided with a BCD (binary-coded decimal) one-digit adder named bcd_fadd that adds two BCD digits and carry-in, and produces a sum and carry-out.

module bcd_fadd {
    input [3:0] a,
    input [3:0] b,
    input     cin,
    output   cout,
    output [3:0] sum );

Instantiate 4 copies of bcd_fadd to create a 4-digit BCD ripple-carry adder. Your adder should add two 4-digit BCD numbers (packed into 16-bit vectors) and a carry-in to produce a 4-digit sum and carry out.

module top_module( 
    input [15:0] a, b,
    input cin,
    output cout,
    output [15:0] sum 
);
    wire c1;
    wire c2;
    wire c3;
    
    bcd_fadd instance1(.a(a[3:0]), .b(b[3:0]), .cin(cin), .cout(c1), .sum(sum[3:0]));
    bcd_fadd instance2(.a(a[7:4]), .b(b[7:4]), .cin(c1), .cout(c2), .sum(sum[7:4]));
    bcd_fadd instance3(.a(a[11:8]), .b(b[11:8]), .cin(c2), .cout(c3), .sum(sum[11:8]));
    bcd_fadd instance4(.a(a[15:12]), .b(b[15:12]), .cin(c3), .cout(cout), .sum(sum[15:12]));

endmodule

 

 

 

 

 

 

 

 

 

 

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