目录
引言：在verilog中已有的系统函数：
- $display
- $monitor
- $finish
- $readmemh 以及 $readmemb ：都是从文件中读取数据，二进制和十六进制的区别
- $random
- ...
SV增添的：
- array system tasks
- variables system tasks
- assertion system tasks
- random number system tasks
- coverage system tasks
- improved verilog system tasks
- packed array system tasks
- ...
1 Array system tasks
该类系统任务的返回类型是integer，可选维度表达式的默认值是1；
- $dimensions：
- 对于packed、unpacked、static、dynamic类型，返回数组中维度的总数；
- 对于字符串类型或任何 其他非array类型，相当于一个简单位向量，返回1；
- 对于其他类型，返回0；
- $unpacked_dimensions：
- 对于unpacked array(statc 或 dynamic)，返回总的维数；
- 对于其他类型，返回0；
- $left：返回维度的左边界；
- $right：返回维度的右边界；
- $low：返回$left和$right的最小值；
- $high：返回 $left和$right的最大值；
- $increment：
- 如果$left大于等于$right，返回1；否则返回0；
- $size：返回元素总数，相当于$high - $low + 1
1 module system_array();
2 // 1 dimension
3 reg [7:0] me = 10;
4 // 2 dimension array of Verilog 2001
5 reg [7:0] mem [0:3] = '{8'h0,8'h1,8'h2,8'h3};
6 // one more example of multi dimention array
7 reg [7:0] mem1 [0:1] [0:3] =
8 '{'{8'h0,8'h1,8'h2,8'h3},'{8'h4,8'h5,8'h6,8'h7}};
9 // One more example of multi dimention array
10 reg [7:0] [0:4] mem2 [0:1] =
11 '{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}};
12 // One more example of multi dimention array
13 reg [7:0] [0:4] mem3 [0:1] [0:1] =
14 '{'{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}},
15 '{{8'h0,8'h1,8'h2,8'h3},{8'h4,8'h5,8'h6,8'h7}}};
16 // Multi arrays in same line declaration
17 bit [7:0] [31:0] mem4 [1:5] [1:10], mem5 [0:255];
18
19 initial begin
20 // $dimensions usage
21 $display ("$dimensions in me %0d mem %0d mem1 %0d",
22 $dimensions(me),$dimensions(mem),$dimensions(mem1));
23 // $unpacked_dimensions
24 $display ("$unpacked_dimensions in me %0d mem %0d mem1 %0d",
25 $unpacked_dimensions(me),$unpacked_dimensions(mem),
26 $unpacked_dimensions(mem1));
27 // $left
28 $display ("$left in me %0d mem %0d mem1 %0d",
29 $left(me),$left(mem),$left(mem1));
30 // $right
31 $display ("$right in me %0d mem %0d mem1 %0d",
32 $right(me),$right(mem),$right(mem1));
33 // $low
34 $display ("$low in me %0d mem %0d mem1 %0d",
35 $low(me),$low(mem),$low(mem1));
36 // $high
37 $display ("$high in me %0d mem %0d mem1 %0d",
38 $high(me),$high(mem),$high(mem1));
39 // $increment
40 $display ("$increment in me %0d mem %0d mem1 %0d",
41 $increment(me),$increment(mem),$increment(mem1));
42 // $size
43 $display ("$size in me %0d mem %0d mem1 %0d",
44 $size(me),$size(mem),$size(mem1));
45
46 #1 $finish;
47 end
48
49 endmodule
50
51 //simulation
52 $dimensions in me 1 mem 2 mem1 3
53 $unpacked_dimensions in me 0 mem 0 mem1 0
54 $left in me 7 mem 0 mem1 0
55 $right in me 0 mem 3 mem1 1
56 $low in me 0 mem 0 mem1 0
57 $high in me 7 mem 3 mem1 1
58 $increment in me 1 mem -1 mem1 -1
59 $size in me 8 mem 4 mem1 2
2 Variable system tasks
- $typename：返回一个表示参数类型的字符串；
- $size,$bits：返回变量的bit大小；
- $isunbounded：如果参数是$(无边界)，则返回true；
1 module system_variable();
2
3 bit signed [2:0] abc;
4 int signed xyz;
5 enum {A,B,C=99} enm;
6
7 typedef struct {bit [7:0] A,B;} AB_t;
8 AB_t AB[10];
9
10 parameter int foo = $;
11
12 initial begin
13 // $typename usage
14 $display ("$typename of abc %s",$typename(abc));
15 $display ("$typename of xyz %s",$typename(xyz));
16 $display ("$typename of enm %s",$typename(enm));
17 $display ("$typename of AB_t %s",$typename(AB_t));
18 $display ("$typename of AB %s",$typename(AB));
19 $display ("$typename of foo %s",$typename(foo));
20 // $bits usage
21 $display ("$bits of abc %0d",$bits(abc));
22 $display ("$bits of xyz %0d",$bits(xyz));
23 $display ("$bits of enm %0d",$bits(enm));
24 $display ("$bits of AB_t %0d",$bits(AB_t));
25 $display ("$bits of AB %0d",$bits(AB));
26 $display ("$bits of foo %0d",$bits(foo));
27 // $isunbounded
28 $display ("$isunbounded of abc %0d",$isunbounded(abc));
29 $display ("$isunbounded of xyz %0d",$isunbounded(xyz));
30 $display ("$isunbounded of enm %0d",$isunbounded(enm));
31 $display ("$isunbounded of AB %0d",$isunbounded(AB));
32 $display ("$isunbounded of foo %0d",$isunbounded(foo));
33 end
34
35 endmodule
36
37 //simulation
38
39 $typename of abc bit signed[2:0]
40 $typename of xyz int
41 $typename of enm enum system_variable.unnamed$$
42 $typename of AB_t struct system_variable.AB_t
43 $typename of AB struct system_variable.AB_t$[0:9]
44 $typename of foo int
45 $bits of abc 3
46 $bits of xyz 32
47 $bits of enm 32
48 $bits of AB_t 16
49 $bits of AB 160
50 $bits of foo 32
51 $isunbounded of abc 0
52 $isunbounded of xyz 0
53 $isunbounded of enm 0
54 $isunbounded of AB 0
55 $isunbounded of foo 1
3 Assertion system tasks
- $assertoff：停止检查所有指定的断言，直到出现后续的$asserton。已在执行的断言不受影响；
- $assertkill：中止当前正在执行断言的执行，然后停止检查所有断言，直到后续出现$asserton；
- $asserton：重启所有指定的断言；
- $fatal；打印运行时致命错误，会自动隐式调用$finish；
- $error：打印运行错误；
- $warning：运行时的警告，可以用工具对其抑制；
- $info：打印没有严重性的断言信息。
1 module system_assert();
2
3 reg clk, grant, request;
4 time current_time;
5
6 initial begin
7 clk = 0;
8 grant = 0;
9 request = 0;
10 #4 request = 1;
11 #4 grant = 1;
12 #4 request = 0;
13 #4 grant = 0;
14 #4 request = 0;
15 #4 grant = 1;
16 #4 request = 0;
17 #4 $finish;
18 end
19
20 always #1 clk = ~clk;
21 //=================================================
22 // Assertion used in always block
23 //=================================================
24 always @ (posedge clk)
25 begin
26 if (grant == 1) begin
27 CHECK_REQ_WHEN_GNT : assert (grant && request) begin
28 $info("Seems to be working as expected");
29 end else begin
30 current_time = $time;
31 // We can use all below statements
32 // $fatal
33 // $error
34 // $warning
35 // $info
36 #1 $warning("assert failed at time %0t", current_time);
37 $assertoff(1,system_assert.CHECK_REQ_WHEN_GNT);
38 end
39 end
40 end
41
42 endmodule
43
44 //simulation
45 Info: "system_assert.sv", 27: system_assert.CHECK_REQ_WHEN_GNT: at time 9
46 Seems to be working as expected
47 Info: "system_assert.sv", 27: system_assert.CHECK_REQ_WHEN_GNT: at time 11
48 Seems to be working as expected
49 "system_assert.sv", 27: system_assert.CHECK_REQ_WHEN_GNT: started at 13s failed at 13s
50 Offending '(grant && request)'
51 Warning: "system_assert.sv", 27: system_assert.CHECK_REQ_WHEN_GNT: at time 14
52 assert failed at time 13
53 Stopping new attempts for assertion CHECK_REQ_WHEN_GNT at time 14s.
4 Random number system tasks
- $urandom_range：产生一组在特定范围的无符号integer数；
- $urandom：每次调用都会返回一个新的无符号的32位随机数；
- $random：为随机对象引入RNG(random number generator)；
- $set_randstate：设置RNG的状态；
- $get_randstate：获取当前的RNG状态。
1 module system_random();
2
3 initial begin
4 // Set the seed
5 $srandom(10);
6 // Randomize number between 1 and 10
7 $display ("Value is %0d",$urandom_range(10,1));
8 // Use seed 10 before randomize
9 $display ("Value is %0d",$urandom(10));
10 end
11
12 endmodule
13
14 //simulation
15 Value is 7
16 Value is 1259199836
5 Coverage system tasks
- $coverage_contral：用于控制或查询层次结构中指定部分的覆盖率可用性；
- $coverage_get_max：获得在层次结构的指定部分上指定覆盖率类型的100%覆盖率的值；
- $coverage_get：获得在层次结构指定部分的给定覆盖类型的当前覆盖值；
- $coverage_merge：将指定覆盖率合并到模拟器中；
- $coverage_save：将当前覆盖率的状态保存到工具的覆盖率数据库中，并将其与给定的名称相关联；
1 module system_coverage();
2
3 reg clk, reset,enable;
4
5 reg [3:0] cnt;
6
7 always @ (posedge clk)
8 if (reset)
9 cnt <= 0;
10 else if (enable)
11 cnt <= cnt + 1;
12
13 initial begin
14 // Disable coverage before reset
15 $coverage_control(`SV_COV_STOP,`SV_COV_STATEMENT,`SV_COV_HIER,$root);
16 clk <= 0;
17 reset <= 1;
18 enable <= 0;
19 $monitor("Count %0d",cnt);
20 repeat (4) @ (posedge clk);
21 reset <= 0;
22 // Enable coverage after reset
23 $coverage_control(`SV_COV_START,`SV_COV_STATEMENT,`SV_COV_HIER,$root);
24 enable <= 1;
25 repeat (4) @ (posedge clk);
26 enable <= 0;
27 #4 $finish;
28 end
29
30 always #1 clk = ~clk;
31
32 endmodule
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