/*
Display object for driving DSI device
@file NT35521.c
@ingroup
@note This panel MUST select ide clock to PLL1 ( 480 ). Once change to \n
another frequence, the _IDE_FDCLK should be re calculated
Copyright Novatek Microelectronics Corp. 2011. All rights reserved.
*/
#include "./../include/dispdev_ifdsi.h"
#define DSI_FORMAT_RGB565 0 //ide use 480 & DSI use 480
#define DSI_FORMAT_RGB666P 1 //ide use 480 & DSI use 480
#define DSI_FORMAT_RGB666L 2 //ide use 480 & DSI use 480
#define DSI_FORMAT_RGB888 3 //ide use 480 & DSI use 480
#define DSI_OP_MODE_CMD_MODE 1
#define DSI_OP_MODE_VDO_MODE 0
#define DSI_PACKET_FORMAT DSI_FORMAT_RGB888 //NT35521 only support RGB888
//#define DSI_TARGET_CLK 480 //real chip use 480Mhz
static int DSI_TARGET_CLK = 480;
#define DSI_OP_MODE DSI_OP_MODE_VDO_MODE//DSI_OP_MODE_CMD_MODE
#define _IDE_FDCLK 108000000 //(480/24)*4 = 80MHz. (IDE = 297MHz, 297/3= 99MHz)
typedef enum {
LCD_PARAM_800X1280 = 0,
LCD_PARAM_1024X600,
LCD_PARAM_600X1024,
LCD_PARAM_480X854,
LCD_PARAM_MAX,
} E_LCD_PARAM;
//static T_LCD_PARAM t_mode_dsi = {0};
static T_PANEL_PARAM s_panel[] = {
//800 x 1280
{
PINMUX_DSI_4_LANE_VDO_SYNC_PULSE_RGB888,
_IDE_FDCLK, //!< fd_clk
908, //!< uiHSyncTotalPeriod
800, //!< uiHSyncActivePeriod
52, //!< uiHSyncBackPorch
1318, //!< ui_vsync_total_period
1280, //!< ui_vsync_active_period
15, //!< ui_vsync_back_porch_odd
15, //!< ui_vsync_back_porch_even
800, //!< ui_buffer_width
1280, //!< ui_buffer_height
800, //!< ui_window_width
1280, //!< ui_window_height
FALSE, //!< b_ycbcr_format
/* New added parameters */
6, //!< ui_hsync_sync_width
6 //!< ui_vsync_sync_width
},
//1024 x 600
{
PINMUX_DSI_4_LANE_VDO_SYNC_PULSE_RGB888,
_IDE_FDCLK, //!< fd_clk
1414, //!< uiHSyncTotalPeriod
1024, //!< uiHSyncActivePeriod
4, //!< uiHSyncBackPorch
648, //!< ui_vsync_total_period
600, //!< ui_vsync_active_period
26, //!< ui_vsync_back_porch_odd
26, //!< ui_vsync_back_porch_even
1024, //!< ui_buffer_width
600, //!< ui_buffer_height
1024, //!< ui_window_width
600, //!< ui_window_height
FALSE, //!< b_ycbcr_format
/* New added parameters */
70, //!< ui_hsync_sync_width
10 //!< ui_vsync_sync_width
},
//600 x 1024
{
},
//480 x 854
{
},
};
static T_IDE_PARAM s_ide = {
/* Old prototype */
PINMUX_LCD_SEL_GPIO, //!< pinmux_select_lcd;
ICST_CCIR601, //!< icst;
{FALSE, FALSE}, //!< dithering[2];
DISPLAY_DEVICE_MIPIDSI, //!< **DONT-CARE**
IDE_PDIR_RGB, //!< pdir;
IDE_LCD_R, //!< odd;
IDE_LCD_G, //!< even;
TRUE, //!< hsinv;
TRUE, //!< vsinv;
FALSE, //!< hvldinv;
FALSE, //!< vvldinv;
TRUE, //!< clkinv;
FALSE, //!< fieldinv;
FALSE, //!< **DONT-CARE**
FALSE, //!< interlace;
FALSE, //!< **DONT-CARE**
0x40, //!< ctrst;
0x00, //!< brt;
0x40, //!< cmults;
FALSE, //!< cex;
FALSE, //!< **DONT-CARE**
TRUE, //!< **DONT-CARE**
TRUE, //!< tv_powerdown;
{0x00, 0x00}, //!< **DONT-CARE**
/* New added parameters */
FALSE, //!< yc_ex
FALSE, //!< hlpf
{FALSE, FALSE, FALSE}, //!< subpix_odd[3]
{FALSE, FALSE, FALSE}, //!< subpix_even[3]
{IDE_DITHER_5BITS, IDE_DITHER_6BITS, IDE_DITHER_5BITS}, //!< dither_bits[3]
FALSE //!< clk1/2
};
static T_PANEL_CMD t_cmd_mode_dsi_716[] = {
#if 1
//enter page1
{DSICMD_CMD, 0xee},
{DSICMD_DATA, 0x50}, // page 1
{DSICMD_CMD, 0xea},
{DSICMD_DATA, 0x85},
{DSICMD_DATA, 0x55);
{DSICMD_CMD, 0x24},
{DSICMD_DATA, 0xa0}, // rgb TE
{DSICMD_CMD, 0x20},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x30},
{DSICMD_DATA, 0x00}, // bist
{DSICMD_CMD, 0x35},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x56},
{DSICMD_DATA, 0x83);
{DSICMD_CMD, 0x79},
{DSICMD_DATA, 0x05}, // zigzag
{DSICMD_CMD, 0x7a},
{DSICMD_DATA, 0x20);
{DSICMD_CMD, 0x7d},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x80},
{DSICMD_DATA, 0x10}, // te v width
{DSICMD_CMD, 0x90},
{DSICMD_DATA, 0x25},
{DSICMD_DATA, 0x40}, // ss_tp
{DSICMD_CMD, 0x93},
{DSICMD_DATA, 0xf8);
{DSICMD_CMD, 0x95},
{DSICMD_DATA, 0x74}, // inv
{DSICMD_CMD, 0x97},
{DSICMD_DATA, 0x08}, // smart gip
{DSICMD_CMD, 0x99},
{DSICMD_DATA, 0x10}, // ss_delay
{DSICMD_CMD, 0xee},
{DSICMD_DATA, 0x60);
{DSICMD_CMD, 0x21},
{DSICMD_DATA, 0x00},
{DSICMD_CMD, 0x27},
{DSICMD_DATA, 0x62}, // vddd
{DSICMD_CMD, 0x2c},
{DSICMD_DATA, 0xf9);
{DSICMD_CMD, 0x29},
{DSICMD_DATA, 0x8a);
{DSICMD_CMD, 0x30},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x31},
{DSICMD_DATA, 0x0f);
{DSICMD_CMD, 0x32},
{DSICMD_DATA, 0xd9}, // vrs_tldo
{DSICMD_CMD, 0x33},
{DSICMD_DATA, 0xc0}, // dsi_rts<1:0>=10
{DSICMD_CMD, 0x34},
{DSICMD_DATA, 0x1f);
{DSICMD_CMD, 0x35},
{DSICMD_DATA, 0x10);
{DSICMD_CMD, 0x36},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x37},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x3a},
{DSICMD_DATA, 0x24}, // gas off
{DSICMD_CMD, 0x3b},
{DSICMD_DATA, 0x00}, // gip_s3s
{DSICMD_CMD, 0x3C},
{DSICMD_DATA, 0x29}, // VCOM -0.911V
{DSICMD_CMD, 0x3d},
{DSICMD_DATA, 0x11},
{DSICMD_DATA, 0x83}, // VGH=16.05V VGL=-10.39V
{DSICMD_CMD, 0x42},
{DSICMD_DATA, 0x5f},
{DSICMD_DATA, 0x5f); //
{DSICMD_CMD, 0x44},
{DSICMD_DATA, 0x07}, // vgl
{DSICMD_CMD, 0x46},
{DSICMD_DATA, 0x8a}, // vgh
{DSICMD_CMD, 0x86},
{DSICMD_DATA, 0x20);
{DSICMD_CMD, 0x89},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x8a},
{DSICMD_DATA, 0xAA);
{DSICMD_CMD, 0x91},
{DSICMD_DATA, 0x44);
{DSICMD_CMD, 0x92},
{DSICMD_DATA, 0x33);
{DSICMD_CMD, 0x93},
{DSICMD_DATA, 0x9B}, // vcsw1=1 vcsw2=0
{DSICMD_CMD, 0x9a},
{DSICMD_DATA, 0x00}, // 800
{DSICMD_CMD, 0x9b},
{DSICMD_DATA, 0x02},
{DSICMD_DATA, 0x80}, // 1280
//gamma2.5--2022/12/02
{DSICMD_CMD, 0x47},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x05},
{DSICMD_DATA, 0x1a},
{DSICMD_DATA, 0x2a},
{DSICMD_DATA, 0x29},//gamma P0.4.8.12.20
{DSICMD_CMD, 0x5a},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x05},
{DSICMD_DATA, 0x1a},
{DSICMD_DATA, 0x2a},
{DSICMD_DATA, 0x29},//gamma n 0.4.8.12.20
{DSICMD_CMD, 0x4c},
{DSICMD_DATA, 0x3a},
{DSICMD_DATA, 0x30},
{DSICMD_DATA, 0x42},
{DSICMD_DATA, 0x20},
{DSICMD_DATA, 0x1f},//28.44.64.96.128.
{DSICMD_CMD, 0x5f},
{DSICMD_DATA, 0x3a},
{DSICMD_DATA, 0x30},
{DSICMD_DATA, 0x42},
{DSICMD_DATA, 0x20},
{DSICMD_DATA, 0x1f},//28.44.64.96.128.
{DSICMD_CMD, 0x51},
{DSICMD_DATA, 0x1d},
{DSICMD_DATA, 0x01},
{DSICMD_DATA, 0x13},
{DSICMD_DATA, 0x0c},
{DSICMD_DATA, 0x18},//159.191.211.227.235
{DSICMD_CMD, 0x64},
{DSICMD_DATA, 0x1d},
{DSICMD_DATA, 0x01},
{DSICMD_DATA, 0x13},
{DSICMD_DATA, 0x0c},
{DSICMD_DATA, 0x18},//159.191.211.227.235
{DSICMD_CMD, 0x56},
{DSICMD_DATA, 0x17},
{DSICMD_DATA, 0x29},
{DSICMD_DATA, 0x35},
{DSICMD_DATA, 0x7f}, //243.247.251.255
{DSICMD_CMD, 0x69},
{DSICMD_DATA, 0x17},
{DSICMD_DATA, 0x29},
{DSICMD_DATA, 0x35},
{DSICMD_DATA, 0x7f}, //243.247.251.255
{DSICMD_CMD, 0xee},
{DSICMD_DATA, 0x70);
//STV0 stv1 stv2
{DSICMD_CMD, 0x00},
{DSICMD_DATA, 0x01},
{DSICMD_DATA, 0x07},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x04},
{DSICMD_DATA, 0x05},
{DSICMD_DATA, 0x0b},
{DSICMD_DATA, 0x55},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x08},
{DSICMD_DATA, 0x08},
{DSICMD_DATA, 0x0c},
{DSICMD_DATA, 0x55},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x0c},
{DSICMD_DATA, 0x02},
{DSICMD_DATA, 0x02);
// CYC0 cyc1
{DSICMD_CMD, 0x10},
{DSICMD_DATA, 0x04},
{DSICMD_DATA, 0x07},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x00);
{DSICMD_CMD, 0x15},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x15},
{DSICMD_DATA, 0x0d},
{DSICMD_DATA, 0x08);
{DSICMD_CMD, 0x29},
{DSICMD_DATA, 0x02},
{DSICMD_DATA, 0x02);
//gip0-gip21=gipL1-gipL22 (forward scan)
{DSICMD_CMD, 0x60},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x08},
{DSICMD_DATA, 0x05},
{DSICMD_DATA, 0x04);
{DSICMD_CMD, 0x65},
{DSICMD_DATA, 0x17},
{DSICMD_DATA, 0x16},
{DSICMD_DATA, 0x15},
{DSICMD_DATA, 0x14},
{DSICMD_DATA, 0x13);
{DSICMD_CMD, 0x6a},
{DSICMD_DATA, 0x12},
{DSICMD_DATA, 0x11},
{DSICMD_DATA, 0x10},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x6f},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c);
{DSICMD_CMD, 0x74},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c);
//gip22-gip43=gipR1-gipR22 (forward scan)
{DSICMD_CMD, 0x80},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x08},
{DSICMD_DATA, 0x05},
{DSICMD_DATA, 0x04);
{DSICMD_CMD, 0x85},
{DSICMD_DATA, 0x17},
{DSICMD_DATA, 0x16},
{DSICMD_DATA, 0x15},
{DSICMD_DATA, 0x14},
{DSICMD_DATA, 0x13);
{DSICMD_CMD, 0x8a},
{DSICMD_DATA, 0x12},
{DSICMD_DATA, 0x11},
{DSICMD_DATA, 0x10},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x01);
{DSICMD_CMD, 0x8f},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c);
{DSICMD_CMD, 0x94},
{DSICMD_DATA, 0x3c},
{DSICMD_DATA, 0x3c},
{DSICMD_CMD, 0xea},
{DSICMD_DATA, 0x00},
{DSICMD_DATA, 0x00); // write enable
{DSICMD_CMD, 0xee},
{DSICMD_DATA, 0x00}, // ENTER PAGE0
{DSICMD_CMD, 0x11}, // Sleep OUT
{CMDDELAY_MS, 120},
{DSICMD_CMD, 0x29}, // display on
{CMDDELAY_MS, 20},
#endif
};
const T_PANEL_CMD t_cmd_standby_dsi[] = {
{DSICMD_CMD, 0x28}, // Display OFF
{CMDDELAY_MS, 10},
//{DSICMD_CMD, 0x10}, // Sleep in
//{CMDDELAY_MS, 10},
};
const T_LCD_ROT *t_rot_dsi = NULL;
//@}
T_LCD_ROT *dispdev_get_lcd_rotate_dsi_cmd(UINT32 *mode_number)
{
#if 0
if (t_rot_dsi != NULL) {
*mode_number = sizeof(t_rot_dsi) / sizeof(T_LCD_ROT);
} else
#endif
{
*mode_number = 0;
}
return (T_LCD_ROT *)t_rot_dsi;
}
//wrx
static T_LCD_PARAM s_mode_dsi = {0};
static int lcd;
T_LCD_PARAM *dispdev_get_config_mode_dsi(UINT32 *mode_number)
{
int lcd_force;
// 固定mode_number == 1
*mode_number = 1;
//这个函数会�??调用2次,?一次去读,?二�?�直接返回指针�?�加速度
if (s_mode_dsi.n_cmd == 0)
{
// 固定T_IDE_PARAM
s_mode_dsi.ide = s_ide;
// 根据BIOS,选择不同的T_PANEL_PARAM
//run_command("mmc read 0x2100000 0x400 0x800", 1);
lcd = ((BIOS_DATA *)(0x2100000))->nLcdType;
//force lcd
lcd_force = env_get_hex("lcd_force", 0);
if (lcd_force != 0)
{
printf("##lcd_force:%x\n", lcd_force);
lcd = lcd_force;
}
printf("##detect lcd %x\n", lcd);
switch (lcd)
{
case 0x716:
s_mode_dsi.panel = s_panel[LCD_PARAM_1024X600];
s_mode_dsi.p_cmd_queue = t_cmd_mode_dsi_716;
s_mode_dsi.n_cmd = sizeof(t_cmd_mode_dsi_716) / sizeof(T_PANEL_CMD);
//开了闪屏,不开波纹
// DSI_TARGET_CLK = 240;
break;
case 0x810:
default:
s_mode_dsi.panel = s_panel[LCD_PARAM_800X1280];
s_mode_dsi.p_cmd_queue = t_cmd_mode_dsi_810;
s_mode_dsi.n_cmd = sizeof(t_cmd_mode_dsi_810) / sizeof(T_PANEL_CMD);
break;
}
}
else
{
printf("skip get T_LCD_PARAM ...\n");
}
return &s_mode_dsi;
}
T_PANEL_CMD *dispdev_get_standby_cmd_dsi(UINT32 *cmd_number)
{
*cmd_number = sizeof(t_cmd_standby_dsi) / sizeof(T_PANEL_CMD);
return (T_PANEL_CMD *)t_cmd_standby_dsi;
}
void dispdev_set_dsi_config(DSI_CONFIG *p_dsi_config)
{
printf("##lck:%d\n", DSI_TARGET_CLK);
dsi_set_config(DSI_CONFIG_ID_FREQ, DSI_TARGET_CLK * 1000000);
#if (DSI_TARGET_CLK == 160) //real is 150MHz
dsi_set_config(DSI_CONFIG_ID_TLPX, 1);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GO, 0); //FPGA: 120MHz, GO = 0
dsi_set_config(DSI_CONFIG_ID_BTA_TA_SURE, 0); //FPGA: 120MHz, SURE = 0
dsi_set_config(DSI_CONFIG_ID_THS_PREPARE, 1);
dsi_set_config(DSI_CONFIG_ID_THS_ZERO, 4);
dsi_set_config(DSI_CONFIG_ID_THS_TRAIL, 2);
dsi_set_config(DSI_CONFIG_ID_THS_EXIT, 3);
dsi_set_config(DSI_CONFIG_ID_TCLK_PREPARE, 1);
dsi_set_config(DSI_CONFIG_ID_TCLK_ZERO, 7);
dsi_set_config(DSI_CONFIG_ID_TCLK_POST, 8);
dsi_set_config(DSI_CONFIG_ID_TCLK_PRE, 1);
dsi_set_config(DSI_CONFIG_ID_TCLK_TRAIL, 1);
#elif(DSI_TARGET_CLK == 960)
dsi_set_config(DSI_CONFIG_ID_TLPX, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GO, 21);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_SURE, 0);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GET, 20);
dsi_set_config(DSI_CONFIG_ID_THS_PREPARE, 5);//4
dsi_set_config(DSI_CONFIG_ID_THS_ZERO, 6);
dsi_set_config(DSI_CONFIG_ID_THS_TRAIL, 3); //7
dsi_set_config(DSI_CONFIG_ID_THS_EXIT, 6);
dsi_set_config(DSI_CONFIG_ID_TCLK_PREPARE, 5);//3
dsi_set_config(DSI_CONFIG_ID_TCLK_ZERO, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_POST, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_PRE, 2);
dsi_set_config(DSI_CONFIG_ID_TCLK_TRAIL, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_HANDSK_TMOUT_VAL, 0x40);
#elif(DSI_TARGET_CLK == 480)
dsi_set_config(DSI_CONFIG_ID_TLPX, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GO, 21);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_SURE, 0);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GET, 20);
dsi_set_config(DSI_CONFIG_ID_THS_PREPARE, 4);
dsi_set_config(DSI_CONFIG_ID_THS_ZERO, 6);
dsi_set_config(DSI_CONFIG_ID_THS_TRAIL, 7);
dsi_set_config(DSI_CONFIG_ID_THS_EXIT, 6);
dsi_set_config(DSI_CONFIG_ID_TCLK_PREPARE, 3);
dsi_set_config(DSI_CONFIG_ID_TCLK_ZERO, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_POST, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_PRE, 2);
dsi_set_config(DSI_CONFIG_ID_TCLK_TRAIL, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_HANDSK_TMOUT_VAL, 0x40);
#elif(DSI_TARGET_CLK == 240)
dsi_set_config(DSI_CONFIG_ID_TLPX, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GO, 21);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_SURE, 0);
dsi_set_config(DSI_CONFIG_ID_BTA_TA_GET, 20);
dsi_set_config(DSI_CONFIG_ID_THS_PREPARE, 4);
dsi_set_config(DSI_CONFIG_ID_THS_ZERO, 6);
dsi_set_config(DSI_CONFIG_ID_THS_TRAIL, 7);
dsi_set_config(DSI_CONFIG_ID_THS_EXIT, 6);
dsi_set_config(DSI_CONFIG_ID_TCLK_PREPARE, 3);
dsi_set_config(DSI_CONFIG_ID_TCLK_ZERO, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_POST, 16);
dsi_set_config(DSI_CONFIG_ID_TCLK_PRE, 2);
dsi_set_config(DSI_CONFIG_ID_TCLK_TRAIL, 3);
dsi_set_config(DSI_CONFIG_ID_BTA_HANDSK_TMOUT_VAL, 0x40);
#endif
dsi_set_config(DSI_CONFIG_ID_DATALANE_NO, DSI_DATA_LANE_3);
dsi_set_config(DSI_CONFIG_ID_TE_BTA_INTERVAL, 0x1F);
dsi_set_config(DSI_CONFIG_ID_CLK_PHASE_OFS, 0x3); //mask check
dsi_set_config(DSI_CONFIG_ID_CLK_LP_CTRL, 0x0);//0x0 check
printf("##2 dsi_set_config \n");
dsi_set_config(DSI_CONFIG_ID_EOT_PKT_EN, TRUE);//mask check
}