quit -sim #退出仿真 .main clear Create the work library vlib work vmap work work Compile the verilog files vlog hall_mon.v #编译.v文件,文件名用自己的.v文件替代 vlog hall_mon_tb.v Run simulation vsim -voptargs=+acc hall_mon_tb #仿真,不优化,否则没有波形 #Add all the top signals add wave * #The time of run run 800us