- Formality 基本流程
1.Start Formality启动formality工具
Gui方式:首先fm_shell , 然后start_gui,source script.tcl
shell方式:见参考脚本
fm_shell -file my_script.tcl |tee -i my_transcript.out
2.Load guidence(导入svf文件)
a.set synopsys_auto_setup true
开这个option之后,工具default的变量如下
hdlin_ignore_embedded_configuration = true
hdlin_ignore_full_case = false
hdlin_ignore_parallel_case = false
signature_analysis_allow_subset_match = false
svf_ignore_unqualified_fsm_information = false
upf_assume_related_supply_default_primary = true
upf_use_additional_db_attributes = true
verification_set_undriven_signals = synthesis
verification_verify_directly_undriven_output = false
set_mismatch_message_filter -warn
b.set_svf myfile.svf
可以通过report_guidance -summary
The results of the status fields are
Accepted – Formality validated and applied the guide command to the reference design.
Rejected – Formality either could not validate or could not apply the guide command to the reference design.
Unsupported – Formality does not currently support the guide command.
Unprocessed – Formality has not processed the guide commands yet. This usually happens when a checkpoint verification has paused the processing.
- Load Design
参考脚本:
read_db ${all_db}
read_verilog -container -r -libname WORK -01 -f
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{RTL_FILELIST} set_top r:/WORK/
RTLFILELISTsettopr:/WORK/DESIGN_NAME
read_verilog -container -i -libname WORK -01 -f
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{Netlist_FILELIST} set_top i:/WORK/
NetlistFILELISTsettopi:/WORK/DESIGN_NAME
4. Performing Setup
该部主要就是对一些port设constant,或者一些primary points不需要比,设ignore等
参考脚本:
set_constant -type port r:/WORK/ D E S I G N N A M E / s c a n m o d e 0 s e t c o n s t a n t − t y p e p o r t i : / W O R K / DESIGN_NAME/scan_mode 0 set_constant -type port i:/WORK/ DESIGNNAME/scanmode0setconstant−typeporti:/WORK/DESIGN_NAME/scan_mode 0
set_dont_verify_point r:/WORK/
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DESIGN_NAME/scanout* set_dont_verify_point i:/WORK/
DESIGNNAME/scanout∗setdontverifypointi:/WORK/DESIGN_NAME/scanout*
5. Matching Compare Points
Formality默认的match方式:
Exact-Name Matching (name-based matching)
Name Filtering (name-based matching)
Topological Equivalence (non name-based matching)
Signature Analysis (non name-based matching)
Compare Point Matching Based on Net Names (name-based matching)
参考脚本
match
report_unmatched_points > $REPORTS_DIR/unmatched_R2N.log
6. Verifying the Design and Interpreting Results
参考脚本:
verify
report_failing_points > $REPORTS_DIR/fail_R2N.log
7. Debug
Debug可以通过一些命令,也可以通过GUI的
Schematics的方式,大部分都是通过Schematics去对比compare point不等的pin,然后往前trace,追到源头不等的点。
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原创链接:https://mp.weixin.qq.com/s/OG5R1QtIInxG1zXyQCGyxg