上周终于将页读页写的操作也实现了,发现比单字节读写能省一半的时间,不错不错,同样注意的是时间间隔,适当延时:
下面的代码是将之前的代码做修改后的,那么操作流程是:
单字节写入五个数
单字节依次读出五个数
页读页写,重复64次,遍历整个地址空间。
#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
#include "xil_io.h"
#include "sleep.h"
#define GIE 0x01c
#define ISR 0x020
#define IER 0x028
#define SOFTR 0x040
#define CR 0x100
#define SR 0x104
#define TX_FIFO 0x108
#define RX_FIFO 0x10c
#define ADR 0x110
#define TX_FIFO_OCY 0x114
#define RX_FIFO_OCY 0x118
#define TEN_ADR 0x11c
#define RX_FIFO_PIRQ 0x120
#define GPO 0x124
#define IIC_Device_ID 0x50
#define PAGE_SIZE 64
struct DataBuffer{
u8 first_8bit_Address;
u8 second_8bit_Address;
u8 Write_Data;
};
void Initialization_IIC();
void Single_Byte_Write(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address,u8 data);
u8 Single_Byte_Read(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address);
void Page_Write(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address);
void Page_Read(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address);
int main() {
u8 Received_data;
struct DataBuffer WriteBuffer[5] ={
{0x00,0x01,0x23},
{0x00,0x10,0x45},
{0x00,0x20,0x67},
{0x00,0x30,0x89},
{0x00,0x40,0xab}
};
init_platform();
Initialization_IIC();
for(int i=0;i<5;i++){
Single_Byte_Write(IIC_Device_ID,WriteBuffer[i].first_8bit_Address,WriteBuffer[i].second_8bit_Address,WriteBuffer[i].Write_Data);
if(i%1024==0)
xil_printf("%d\n\r",i);}
for(int i=0;i<5;i++){
Received_data = Single_Byte_Read(IIC_Device_ID,WriteBuffer[i].first_8bit_Address,WriteBuffer[i].second_8bit_Address);
xil_printf("0x%x%x\tReceived:%x\n\r",WriteBuffer[i].first_8bit_Address,WriteBuffer[i].second_8bit_Address,Received_data);
}
for (int i =0;i<64;i++){
Page_Write(IIC_Device_ID,i,0x00);
Page_Read(IIC_Device_ID,i,0x00);
xil_printf("%d 1 Page\n\r",i);
Page_Write(IIC_Device_ID,i,0x40);
Page_Read(IIC_Device_ID,i,0x40);
xil_printf("%d 2 Page\n\r",i);
Page_Write(IIC_Device_ID,i,0x80);
Page_Read(IIC_Device_ID,i,0x80);
xil_printf("%d 3 Page\n\r",i);
Page_Write(IIC_Device_ID,i,0xc0);
Page_Read(IIC_Device_ID,i,0xc0);
xil_printf("%d 4 Page\n\r",i);
}
xil_printf("Test finish.\n\r");
cleanup_platform();
return 0;
}
/**********************************************************************************************/
// Initialization
// 1.Set the RX_FIFO depth to maximum by setting RX_FIFO_PIRQ = 0x _ _
// 2.Reset the TX_FIFO with 0x_ _
// 3.Enable the AXI IIC, remove the TX_FIFO reset, and disable the general call
// Parameter:
// None.
// Return:
// None.
void Initialization_IIC() {
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + RX_FIFO_PIRQ, 0x0000000f);//Set the RX_FIFO depth
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + CR, Xil_In32(XPAR_AXI_IIC_0_BASEADDR + CR)|0x00000002);//Reset the TX_FIFO
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + CR, Xil_In32(XPAR_AXI_IIC_0_BASEADDR + CR)|0x00000001);//Enable the AXI IIC
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + CR, Xil_In32(XPAR_AXI_IIC_0_BASEADDR + CR)&0xfffffffd);//Remove the TX_FIFO reset
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + CR, Xil_In32(XPAR_AXI_IIC_0_BASEADDR + CR)&0xffffffbf);//Disable the general call
xil_printf("Initialization_IIC Device finished.\n\r");
}
/**********************************************************************************************/
// Write Bytes to an IIC Slave Device Addressed as 0x_ _
// Place the data at slave device address 0x__:
// 1.Check that all FIFOs are empty and that the bus is not busy by reading the SR
// 2.Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
// 3.Write 0x__ to the TX_FIFO (slave address for data)
// 4.Write 0x__ to the TX_FIFO (byte 1)
// 5.Write 0x__ to the TX_FIFO (byte 2)
// 6.Write 0x__ to the TX_FIFO (stop bit, byte x)
// Parameter:
// Device_ID:0x01010,A2,A1,A0
// high_8bit_Address:first word address
// low_8bit_Address:second word address
// data:8bit send data
// Return:
// None.
void Single_Byte_Write(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address,u8 data){
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x000000C4) != 0x000000c0) {}//Check that all FIFOs are empty and that the bus is not busy by reading the SR
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000100);//Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, high_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, low_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, data|0x00000200);//Write 0x__ to the TX_FIFO (stop bit, byte 1)
usleep(100000);
}
/**********************************************************************************************/
// Read Bytes from an IIC Device Addressed as 0x_ _
// 1.Check that all FIFOs are empty and that the bus is not busy by reading the Status register
// 2.Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
// 3¡£Write 0x__ to the TX_FIFO (slave address for data)
// 4.Write 0x__ to the TX_FIFO (slave address for data)
// 5.Write 0x___ to the TX_FIFO (set start bit, device address to 0x__, read access)
// 6.Write 0x___ to the TX_FIFO (set stop bit, four bytes to be received by the AXI IIC)
// 7.Wait until the RX_FIFO is not empty.
// a) Read the RX_FIFO byte.
// b) If the last byte is read, then exit; otherwise, continue checking while RX_FIFO is not empty.
// Parameter:
// Device_ID:0x01010,A2,A1,A0
// high_8bit_Address:first word address
// low_8bit_Address:second word address
// Return:
// 8bit Recevived data.
u8 Single_Byte_Read(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address){
u8 Received_data;
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x000000C4) != 0x000000c0) {}//Check that all FIFOs are empty and that the bus is not busy by reading the Status register
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000100);Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, high_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, low_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000101);//Write 0x___ to the TX_FIFO (set start bit, device address to 0x__, read access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, 0x00000200);//Write 0x___ to the TX_FIFO (set stop bit, four bytes to be received by the AXI IIC)
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x00000040) == 0x00000040) {}//Wait until the RX_FIFO is not empty.
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x00000040) != 0x00000040){
Received_data = Xil_In32(XPAR_AXI_IIC_0_BASEADDR + RX_FIFO);
}
return Received_data;
}
/**********************************************************************************************/
// Write Page to an IIC Slave Device Addressed as 0x_ _
// Place the data at slave device address 0x__:
// 1.Check that all FIFOs are empty and that the bus is not busy by reading the SR
// 2.Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
// 3.Write 0x__ to the TX_FIFO (slave address for data)
// 4.Write 0x__ to the TX_FIFO (byte 1)
// 5.Write 0x__ to the TX_FIFO (byte 2)
// 6.Write 0x__ to the TX_FIFO (stop bit, byte x)
// Parameter:
// Device_ID:0x01010,A2,A1,A0
// high_8bit_Address:first word address
// low_8bit_Address:second word address
// Return:
// None.
void Page_Write(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address){
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x000000C4) != 0x000000c0) {}//Check that all FIFOs are empty and that the bus is not busy by reading the SR
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000100);//Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, high_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, low_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
for(int i=0;i<PAGE_SIZE;i++) {
if(i==PAGE_SIZE-1)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, i|0x00000200);
else
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, i);
if(i%4==0) usleep(100000);
xil_printf("Send_data=%x\n\r",i);
}
usleep(100000);
}
/**********************************************************************************************/
// Read Page from an IIC Device Addressed as 0x_ _
// 1.Check that all FIFOs are empty and that the bus is not busy by reading the Status register
// 2.Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
// 3¡£Write 0x__ to the TX_FIFO (slave address for data)
// 4.Write 0x__ to the TX_FIFO (slave address for data)
// 5.Write 0x___ to the TX_FIFO (set start bit, device address to 0x__, read access)
// 6.Write 0x___ to the TX_FIFO (set stop bit, four bytes to be received by the AXI IIC)
// 7.Wait until the RX_FIFO is not empty.
// a) Read the RX_FIFO byte.
// b) If the last byte is read, then exit; otherwise, continue checking while RX_FIFO is not empty.
// Parameter:
// Device_ID:0x01010,A2,A1,A0
// high_8bit_Address:first word address
// low_8bit_Address:second word address
// Return:
// None.
void Page_Read(u8 Device_ID, u8 high_8bit_Address,u8 low_8bit_Address){
u8 Received_data;
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x000000C4) != 0x000000c0) {}//Check that all FIFOs are empty and that the bus is not busy by reading the Status register
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000100);Write 0x___ to the TX_FIFO (set the start bit, the device address, write access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, high_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, low_8bit_Address);//Write 0x__ to the TX_FIFO (slave address for data)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, (Device_ID<<1)|0x00000101);//Write 0x___ to the TX_FIFO (set start bit, device address to 0x__, read access)
Xil_Out32(XPAR_AXI_IIC_0_BASEADDR + TX_FIFO, 0x00000240);//Write 0x___ to the TX_FIFO (set stop bit, four bytes to be received by the AXI IIC)
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x00000040) == 0x00000040) {}//Wait until the RX_FIFO is not empty.
while((Xil_In32(XPAR_AXI_IIC_0_BASEADDR + SR) & 0x00000040) != 0x00000040){
Received_data = Xil_In32(XPAR_AXI_IIC_0_BASEADDR + RX_FIFO);
xil_printf("Received_data=%x\n\r",Received_data);
}
}
签名:20201102 olivercao 著