题目 | 年份 | 主要内容 | 引用 |
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模拟电路中晶体管阵列的性能感知公共质心布局和布线 | 2021 | 还需要细看 | A. K. Sharma et al., “Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits,” 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021, pp. 1-9, doi: 10.1109/ICCAD51958.2021.9643532. |
自动电流镜布局 (ACML) 工具 | 2019 | 粗略,人工跑通DRC,背景可借鉴 | F. Atef et al., “Automated Current Mirror Layout (ACML) Tool,” 2019 31st International Conference on Microelectronics (ICM), 2019, pp. 182-185, doi: 10.1109/ICM48031.2019.9021930. |
MOS晶体管单元电路的最佳二维公共质心布局生成 | 2005 | 2021年一篇对比工作 方法简单易懂好实现、三个电路和版图,没有实际性能对比,跟进 | Di Long, Xianlong Hong and Sheqin Dong, “Optimal two-dimension common centroid layout generation for MOS transistors unit-circuit,” 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 2999-3002 Vol. 3, doi: 10.1109/ISCAS.2005.1465258. |
寄生感知共质心 FinFET 布局和布线以实现电流比匹配 | 2016 | 实验评估和数据,具体方法待看, 调研要看, | P. H. Wu et al., “Parasitic-aware common-centroid FinFET placement and routing for current-ratio matching”, ACM T. Des. Automat. El., vol. 21, no. 3, pp. 39, 2016. |
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改善电流不匹配的级联电流镜布局设计 | 2002 | 鳍式布局 | 6. Dhawan, Deepak. (2002). Layout Design of Cascode Current Mirror with Improved Current Mismatch. |
2020 | |||
有源和无源设备的共质心布局:回顾和未来之路 | 2022 | 晶体管相关匹配 和 部分文献 | Nibedita Karmokar, Meghna Madhusudan, Arvind K. Sharma, Ramesh Harjani, Mark Po-Hung Lin, Sachin S. Sapatnekar, “Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead”, 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), pp.114-121, 2022. |
电流镜共质心布局
于 2022-06-20 23:43:51 首次发布
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