【芯片学习】【pLL】AD9520

相关公式：

1、

    限制条件： ((B>=3)||(B = 1))&&(B>A)

2、    N = (P × B) + A
where P can be 2, 4, 8, 16, or 32
1)Prescaler,
The prescaler of the AD9520 allows for two modes of operation

            

管脚描述：

寄存器：

1、0x1E1<1:0>    => 设置时钟源

Table 31 shows how the VCO, CLK, and VCO divider are selected. 0x1E1[1:0] selects the channel divider source and determines whether the VCO divider is used. It is not possible to select the VCO without using the VCO divider.

2、PLL Reference Inputs：Either a differential or a single-ended reference must be specifically enabled. All PLL reference inputs are off by default. The differential input and the single-ended inputs share two pins, REFIN (REF1)/REFIN (REF2). The desired reference input type is selected and controlled by 0x01C (see Table 49 and Table 53[DATASHEET]).

Crystal mode is nearly identical to differential mode. The user enables a maintaining amplifier by setting the Enable XTAL OSC bit, and putting a series resonant, AT fundamental cut crystal across the REFIN/REFIN pins.

Manual switchover is performed either through Register 0x01C or by u