DSP6657 GPIO中断学习（只支持GPIO0-15）

1 简介

使用创龙板卡的KEY2按键通过中断的方式控制LED3的亮灭

2 中断学习

在C665x设备上，CPU中断是通过C66x CorePac中断控制器进行配置的。该中断控制器允许最多128个系统事件被编程到任意12个CPU可屏蔽中断输入（CPUINT4至CPUINT15）、CPU异常输入（EXCEP）或高级仿真逻辑中。这128个系统事件包括了内部生成的事件（在CorePac内）和芯片级事件。

此实验将事件91通过中断控制器连接到可屏蔽中断CPUINT12达到目的。

3 参考代码

main.c

#include <stdio.h>
/* Compiler Header files */
#include <stdint.h>
/* CSL Header file */
#include <ti/csl/csl_chipAux.h>
#include <ti/csl/src/intc/csl_intc.h>

/* Driver utilities include */
#include "driver/c66x_gpio.h"

#define PIN_CONTROL_0               0x02620580  //	GPIO控制寄存器基地址
#define LED1             GPIO_19
#define LED2             GPIO_22
#define LED3             GPIO_23
#define KEY2             GPIO_0



/* INTC Objects */
CSL_IntcObj                  gpioIntcObj;
CSL_IntcContext              context;
CSL_IntcEventHandlerRecord   EventHandler[30];


static void test_isr_handler (void *arg)
{
	printf("succeeded!\n");
	if (gpio_read_input(KEY2) == GPIO_LOW)//按键真的被按下了
	{
		if (gpio_read_input(LED3) == GPIO_LOW)		//LED3翻转
		gpio_set_output(LED3);//GPIO23设置为高电平，LED3熄灭
		else
		gpio_clear_output(LED3);//GPIO23设置为低电平，LED3点亮
	}
}

int Interrupts_Init(void)
{

	CSL_IntcGlobalEnableState   state;
    CSL_Status                  intStat;
    CSL_IntcEventHandlerRecord  EventRecord;
    CSL_IntcParam               vectId;
    CSL_IntcHandle              gpioIntcHandle;

    /* INTC module initialization */
	context.eventhandlerRecord = EventHandler;
	context.numEvtEntries      = 1 ;//中断个数
	if (CSL_intcInit(&context) != CSL_SOK)
		return -1;

	/* Enable NMIs */
	if (CSL_intcGlobalNmiEnable() != CSL_SOK)
		return -1;

	/* Enable global interrupts */
	intStat = CSL_intcGlobalEnable(&state);

    /* Open INTC */
	vectId = CSL_INTC_VECTID_12;//此处选择使用十二个可屏蔽中断
	gpioIntcHandle = CSL_intcOpen(&gpioIntcObj, CSL_GEM_GPINTN, &vectId, &intStat);//第二项参数为128个中断事件的某一个，此处为事件91
	if (gpioIntcHandle == NULL)
		return -1;

	/* Bind ISR to Interrupt */
	EventRecord.handler = (CSL_IntcEventHandler)&test_isr_handler;//此处关联中断处理函数
	EventRecord.arg     = gpioIntcHandle;
	CSL_intcPlugEventHandler(gpioIntcHandle, &EventRecord);

	/* Event Enable */
	CSL_intcHwControl(gpioIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);

	gpio_enable_global_interrupt();
	gpio_set_fallingedge_interrupt(KEY2);
	printf("interrupt init succeeded!\n");

	return 0;
}





//基于CPU周期的延迟函数，100000000=100ms
void cpu_delaycycles(uint32_t cycles) {
	uint32_t start_val;
	/* Start TCSL so its free running */
	CSL_chipWriteTSCL(0);
	start_val = CSL_chipReadTSCL();
	while ((CSL_chipReadTSCL() - start_val) < cycles)
		;
}




int main(void) {

	/* Set pin as GPIO mode */
	*((uint32_t *) PIN_CONTROL_0) |= ((1 << LED1)|
	(1 << LED2) |(1 << KEY2 ) |
	(1 << LED3));

	/* Set GPIO as output mode */
	gpio_set_direction(LED1, GPIO_OUT);
	gpio_set_direction(LED2, GPIO_OUT);
	gpio_set_direction(LED3, GPIO_OUT);
	gpio_set_direction(KEY2, GPIO_IN);

	Interrupts_Init();
	while (1) ;
}

6657.cmd

-heap  0x4000/* 16KB */
-stack 0x4000/* 16KB */

MEMORY
{
	/*
	 * L2SRAM Core internal address
	 * if other cores or peripherals access, change to global address
	 * Core 0: 0x10800000 ~ 0x1087FFFF
	 * Core 1: 0x11800000 ~ 0x1187FFFF (only C6657)
	 */
	L2SRAM 			o = 0x00800000 l = 0x00100000 /* 1MB L2SRAM */
	/* Core0 running IBL will take up 0x0C000000 ~ 0x0C01FFFF(128KB), reserve at here! */
	MSMCSRAM 		o = 0x0C020000 l = 0x000E0000 /* 896KB MSMCSRAM */
	DDR3 			o = 0x80000000 l = 0x20000000 /* 512MB DDR3 */

}

SECTIONS
{
	.text:_c_int00 > L2SRAM /* program entry address */
	.text	> L2SRAM /* executable code */
	.cinit	> L2SRAM /* tables which initialize global variables */
	.const	> L2SRAM /* initialized global constant */
	.switch > L2SRAM /* jump tables for certain switch statements */
	.stack 	> L2SRAM /* system stack */
	.data	> L2SRAM /* initialized global data */
	.far 	> L2SRAM /* far initialized global constant */
	.fardata > L2SRAM /* far uninitialized global and global variables */
	.cio 	> L2SRAM /* buffer for stdio functions */
	.sysmem > L2SRAM /* malloc heap */

	GROUP
	{
		.neardata /* far uninitialized global and global variables */
		.rodata	/* global static constant */
		.bss /* uninitialized global variables*/
	} > L2SRAM
}