模100 计数器
module counter100 #(parameter N=100, WIDTH=7)(
input clk,
input rst_n_a,
output reg [WIDTH-1:0] counter,
output reg en); //计数完成一次输出使能
always@(posedge clk or negedge rst_n_a)
if(!rst_n_a)
begin counter<=0; en<=0;end
else if(counter==N-1)
begin counter<=0; en<=1; end
else begin counter<=counter+1; en<=0; end
endmodule
测试代码(sv)
module tb_counter100(
);
logic clk, rst_n_a, en;
logic [6:0] counter;
counter100 #(.N(100), .WIDTH(7)) counter100(clk, rst_n_a, counter, en);
initial
begin
clk=0;
forever #5 clk=~clk;
end
initial
begin
rst_n_a=0;
#34
rst_n_a=1;
end
endmodule