跨时钟域处理中,单比特脉冲,由快时钟域到慢时钟域可用脉冲同步器;
// 脉冲同步器
// 输入高电平,寄存器内容反转,输入低电平寄存器保持不变;
module pulse_syn1(
input clk1,
input clk2,
input rst_n,
input p_in,
output p_out);
reg p;
reg p0, p1, p2;
always@(posedge clk1 or negedge rst_n)
if(!rst_n)
p<=0;
else if(p_in)
p<=!p;
else p<=p;
always@(posedge clk2 or negedge rst_n)
if(!rst_n)
{p2, p1, p0}<=3'b000;
else
{p2, p1, p0}<={p1, p0, p};
assign p_out= p1^p2;
endmodule
//-------------------------------------
// 脉冲同步器另一种写法
module pulse_sync(
input sclk_1,
input sclk_2,
input rst_n,
input p_in ,
output p_out ,
output p_out1 );
reg p_in_reg;
reg delay0,delay1,delay2;
wire mux_2;
assign mux_2=(p_in==1'b1)?~p_in_reg:p_in_reg;
always@(posedge sclk_1, negedge rst_n)
if (!rst_n)
p_in_reg<=1'b0;
else
p_in_reg<=mux_2;
assign p_out1=p_in_reg;
always@(posedge sclk_2, negedge rst_n)
if (!rst_n)
{delay2,delay1,delay0}<=3'b000;
else
{delay2,delay1,delay0}<={delay1,delay0,p_in_reg};
assign p_out=delay2^delay1;
endmodule