HDLBits刷题合集—7 Basic Gates
HDLBits-44 Exams/m2014 q4h
Problem Statement
实现以下电路:
代码如下:
module top_module (
input in,
output out);
assign out = in;
endmodule
HDLBits-45 Exams/m2014 q4i
Problem Statement
实现以下电路:
代码如下:
module top_module (
output out);
assign out = 1'b0;
endmodule
HDLBits-46 Exams/m2014 q4e
Problem Statement
实现以下电路:
代码如下:
module top_module (
input in1,
input in2,
output out);
assign out = ~(in1 | in2);
endmodule
HDLBits-47 Exams/m2014 q4f
Problem Statement
实现以下电路:
代码如下:
module top_module (
input in1,
input in2,
output out);
assign out = in1 & (~in2);
endmodule
HDLBits-48 Exams/m2014 q4g
Problem Statement
实现以下电路:
代码如下:
module top_module (
input in1,
input in2,
input in3,
output out);
wire out1;
assign out1 = in1 ~^ in2;
assign out = in3 ^ out1;
endmodule
HDLBits-49 Gates
Problem Statement
让我们尝试同时构建几个逻辑门。用a和b两个输入建立一个组合电路,
它有7个输出,每个输出都有一个逻辑门驱动:
output | input |
---|---|
out_and | a and b |
out_or | a or b |
out_xor | a xor b |
out_nand | a nand b |
out_nor | a nor b |
out_xnor | a xnor b |
out_anotb | a and-not b |
代码如下:
module top_module(
input a, b,
output out_and,
output out_or,
output out_xor,
output out_nand,
output out_nor,
output out_xnor,
output out_anotb
);
assign out_and = a & b;
assign out_or = a | b;
assign out_xor = a ^ b;
assign out_nand = ~(a & b);
assign out_nor = ~(a | b);
assign out_xnor = a ~^ b;
assign out_anotb = a & (~b);
endmodule
HDLBits-50 7420
Problem Statement
7400系列集成电路是一系列数字芯片,每个芯片有几个逻辑门。7420是一个有两个4输入与非门的芯片。创建一个具有与7420芯片相同功能的模块。它有8