VIVADO 报错:jtag node is not accessible 和 End of startup status: LOW 下载程序失败
总结分析思路:
检查工程中选择器件型号和IP核中器件型号,均没问题。
还有可能芯片部分损毁,换一块片子试试。
资源和功耗方面分析(加入新模块后功耗增加,测试下载时供电的稳定性)
需要检查引脚分配和电平
reset_project 重置当前项目重置为开始状态,清除在综合,模拟,实现和write_bitstream过程中创建的各种输出文件,包括临时文件(或 reset_project -exclude ip)
检查芯片供电,用示波器测试芯片供电后发现程序下载到99%后出现如下波形,判断是供电造成的影响。
参考资料:
- https://support.xilinx.com/s/question/0D52E000070SnuVSAS/error-common-1739-programhwdevices-failed-due-to-earlier-errors?language=en_US
- https://jishuzhan.net/article/1756931366940839938
- https://bbs.eetop.cn/thread-881440-1-1.html
- https://support.xilinx.com/s/question/0D52E00006hpe1rSAA/error-labtools-273165-end-of-startup-status-low?language=en_US
- https://support.xilinx.com/s/question/0D52E00006hppKQSAY/labtools-273165-end-of-startup-statuslow?language=en_US
- https://blog.csdn.net/Pieces_thinking/article/details/113575682
- https://www.cnblogs.com/Ivan0506/p/17370447.html
- https://support.xilinx.com/s/question/0D52E00007BsfDESAZ/cant-program-a-bit-file-into-zynq-7000-fpga?language=en_US
- https://support.xilinx.com/s/question/0D52E00006hpVouSAE/zynq-config-failure-by-jtag-after-download-100-stream?language=zh_CN
- https://support.xilinx.com/s/question/0D54U00005p8OXTSA2/jtag-node-is-not-accessible-after-pl-config-zynq?language=en_US
- https://support.xilinx.com/s/question/0D52E000070SnuVSAS/error-common-1739-programhwdevices-failed-due-to-earlier-errors?language=en_US