在永磁同步电机的控制中,需要对电机的三相定子施加一定的电压,才能控制电机转动。现在用的较多的是SVPWM(SVPWM的具体原理会在后面另写一篇博客说明),要想产生SVPWM波形,需要控制的三相电压呈如下形式,即A、B、C三相的电压是中间对齐的,这就需要用到stm32定时器的中间对齐模式了。
1、stm32的时钟树
stm32的时钟树如下图所示,简单介绍一下stm32时钟的配置过程。以外部时钟作为时钟源为例。HSE代表外部时钟(假设为8M)、SYSCLK为系统时钟,经过倍频器之后变成168M、SYSCLK经过AHB预分频器(假设分频系数为1)后变成HCLK时钟等于系统时钟SYSCLK,HCLK即AHB外部总线时钟,经过APB预分频器分出APB1时钟(分频系数为2,低速设备SYSCLK/4)与APB2时钟(分频系数为1,高速设备SYSCLK/2)
HSE->SYSCLK->HCLK->APB1、APB2。
针对stm32f427的配置源码如下
2、stm32定时器的时钟
stm32定时器分为高级定时器(TIM1与TIM8)、通用定时器(TIM2-TIM5、TIM9-TIM14)、基本定时器(TIM6、TIM7)。不同的定时器使用不同的时钟。
其中TIM1、TIM8、TIM10、TIM11使用的是APB2时钟,而其余定时器使用的是APB1时钟。
在stm32手册中有这么一段话
根据前面RCC配置可以知道TIM1、TIM8、TIM10、TIM11使用的时钟频率为SYSCLK,其他定时器使用的时钟频率为SYSCLK/2
3、stm32定时器1的中间对齐模式
对齐模式的图示如下图所示,可以看到在中心对齐模式下产生的PWM波形的周期比实际计数周期要大1倍,所以假设要使用中间对齐模式,并且需要产生的PWM波频率为20K,那么对应的定时器时基应该设为40K。
在SVPWM波的产生过程中使用的是定时器1的3对互补的PWM通道,它的配置如下
static void SetSysClock(void)
{
#if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* Select regulator voltage output Scale 1 mode */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
/* HCLK = SYSCLK / 1*/
RCC->CFGR |= RCC_CFGR_HPRE_DIV1;//AHB时钟
#if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F429_439xx)
/* PCLK2 = HCLK / 2*/
RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;//APB2时钟
/* PCLK1 = HCLK / 4*/
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;//APB1时钟
#endif /* STM32F40_41xxx || STM32F427_437x || STM32F429_439xx */
/* Configure the main PLL */
RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
(RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
/* Enable the main PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till the main PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
/* Enable the Over-drive to extend the clock frequency to 180 Mhz */
PWR->CR |= PWR_CR_ODEN;
while((PWR->CSR & PWR_CSR_ODRDY) == 0)
{
}
PWR->CR |= PWR_CR_ODSWEN;
while((PWR->CSR & PWR_CSR_ODSWRDY) == 0)
{
}
/* Configure Flash prefetch, Instruction cache, Data cache and wait state */
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
#endif /* STM32F427_437x || STM32F429_439xx */
/* Select the main PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= RCC_CFGR_SW_PLL;
/* Wait till the main PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}
static void TIM1_Configuration(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);//使能定时器1时钟
Time1_Period = (SystemCoreClock / 40000 );//定时器频率为APB2频率的2倍=HCLK 自动重装载为40K,最大值为4200
Limit_Pluse_Max_Value = Time1_Period * 0.95;
/* TIM1 Peripheral Configuration */
TIM_DeInit(TIM1);
/* Time Base configuration */
//配置定时器的计数方式为中间对齐方式,所以产生的PWM波的频率为20K
TIM_TimeBaseStructure.TIM_Prescaler = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;//TIM_CounterMode_Up;TIM_CounterMode_CenterAligned1
TIM_TimeBaseStructure.TIM_Period = Time1_Period - 1;//PERIOD;//定时器时基40K
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0x0;
TIM_TimeBaseInit(TIM1,&TIM_TimeBaseStructure);
/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = Time1_Period / 2;//CCR1_Val; //占空比50%
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;//TIM_OCPolarity_Low;TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;//TIM_OCNPolarity_Low;TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;//TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
TIM_OC1Init(TIM1,&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = Time1_Period / 2;//CCR2_Val;//占空比50%
TIM_OC2Init(TIM1,&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = Time1_Period / 2;//CCR3_Val;//占空比50%
TIM_OC3Init(TIM1,&TIM_OCInitStructure);
// /* Channel 4 Configuration in OC */
// TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
// TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
// TIM_OCInitStructure.TIM_Pulse = 4000;//Time1_Period / 2; //1500;//PERIOD - 1;
//
// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
// TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
// TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
// TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
// TIM_OC4Init(TIM1,&TIM_OCInitStructure);
/* TIMx->CCMR1的bit3设为1:输出比较寄存器预装载使能 */ // PWM占空比改变只在更新事件时生效
TIM_OC1PreloadConfig(TIM1,TIM_OCPreload_Enable);//A相
/* TIMx->CCMR1的bit11设为1:输出比较寄存器预装载使能 */ // PWM占空比改变只在更新事件时生效
TIM_OC2PreloadConfig(TIM1,TIM_OCPreload_Enable);//B相
/* TIMx->CCMR2的bit3设为1:输出比较寄存器预装载使能 */ // PWM占空比改变只在更新事件时生效
TIM_OC3PreloadConfig(TIM1,TIM_OCPreload_Enable);//C相
// TIM_OC4PreloadConfig(TIM1,TIM_OCPreload_Enable);//电磁铁
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
TIM_BDTRInitStructure.TIM_DeadTime = 50;
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;//TIM_Break_Enable;
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;//TIM_AutomaticOutput_Enable;
TIM_BDTRConfig(TIM1,&TIM_BDTRInitStructure);
TIM_SelectOutputTrigger(TIM1,TIM_TRGOSource_Update);
/* TIM1 counter enable */
// TIM_Cmd(TIM1,ENABLE);
/* Main Output Enable */
TIM_CtrlPWMOutputs(TIM1,ENABLE);//由于使用中间对齐模式,PWM频率为20K
//TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);//定时器1的溢出中断
}