HI3518E平台ISP调试环境搭建

最新推荐文章于 2024-08-26 09:06:49 发布

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最新推荐文章于 2024-08-26 09:06:49 发布

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分类专栏： HI3520D 文章标签： sdk 调试 ipc

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海思的SDK提供了ISP调试的相关工具，降低了IPC开发ISP调试的难度。初次搭建ISP调试环境，记录一下。

SDK版本：Hi3518_MPP_V1.0.A.0

硬件平台：HI3518E_OV9732

工具包：PQ_TOOL (Hi3518E_V100R001C01SPC0A0\01.software\pc\PQ_TOOL)

文件说明：Hi3518_ITTB_MPP2_V1.0.A.0_B030.tgz 设备端工具； PQTools_V3.7.5.zip PC端工具

环境搭建步骤：

（1）将Hi3518_ITTB_MPP2_V1.0.A.0_B030.tgz拷贝至nfs共享目录名，解压后运行HiIspTool.sh脚本

倘若用海思自带的工具出图像并调节ISP运行：

#./HiIspTool.sh -a -p ov9732_720p_line.ini

ps一下可以看到两个进程

696 adminlvj 58488 S ./ittb_stream -p ov9732_720p_line.ini
699 adminlvj 19676 S ./ittb_control

倘若运行自己的工程出图像了，这时只需要运行一下命令即可。

#./HiIspTool.sh -a

ps一下可以看到一个进程

699 adminlvj 19676 S ./ittb_control

（2）PC端直接解压PQTools_V3.7.5.zip，运行HiPQTools.exe，输入选择sdk版本Hi3518_MPP_V1.0.A.0 ，输入设备IP，就可以连接上摄像头

倘若运行了ittb_stream，可以PC端软件上打开视频图像窗口

连接成功，至此，最简单的ISP调试环境搭建就完成了。复杂的就是后面的ISP调节过程了。

备注：

运行脚本的时候可能会报错，查看相关打印信息，将错误消除。当前产品我们用的是HI3518E+OV9732，SDK中并没有提供相关的sensor库和相关的config文件，所以运行报错了！

解决：将OV9732sensor库拷贝至Hi3518_ITTB_MPP2_V1.0.A.0/libs/下，将ov9732_720p_line.ini拷贝至Hi3518_ITTB_MPP2_V1.0.A.0/configs/下

附录：

ov9732_720p_line.ini

[plain] view plain copy print ?

[sensor]
Sensor_type =ov9732 ;the type of sensor
Mode =0 ;LINE mode,mode = 0 ,WDR mode,mode =1
DllFile =libs/libsns_ov9732.so ;LineDllFile path
[vi_dev]
Input_mod =2 ;VI_INPUT_MODE_BT656 = 0
;VI_INPUT_MODE_BT601,
;VI_INPUT_MODE_DIGITAL_CAMERA
Work_mod =0 ;VI_WORK_MODE_1Multiplex = 0
;VI_WORK_MODE_2Multiplex,
;VI_WORK_MODE_4Multiplex
Combine_mode =0 ;Y/C composite or separation mode
;VI_COMBINE_COMPOSITE = 0 /*Composite mode */
;VI_COMBINE_SEPARATE, /*Separate mode */
Comp_mode =0 ;Component mode (single-component or dual-component)
;VI_COMP_MODE_SINGLE = 0, /*single component mode */
;VI_COMP_MODE_DOUBLE = 1, /*double component mode */
Clock_edge =1 ;Clock edge mode (sampling on the rising or falling edge)
;VI_CLK_EDGE_SINGLE_UP=0, /*rising edge */
;VI_CLK_EDGE_SINGLE_DOWN, /*falling edge */
Mask_num =2 ;Component mask
Mask_0 =0xFFC00000
Mask_1 =0x0
Scan_mode = 1;VI_SCAN_INTERLACED = 0
;VI_SCAN_PROGRESSIVE,
Data_seq =2 ;data sequence (ONLY for YUV format)
;----2th component U/V sequence in bt1120
; VI_INPUT_DATA_VUVU = 0,
; VI_INPUT_DATA_UVUV,
;----input sequence for yuv
; VI_INPUT_DATA_UYVY = 0,
; VI_INPUT_DATA_VYUY,
; VI_INPUT_DATA_YUYV,
; VI_INPUT_DATA_YVYU
Vsync =1 ; vertical synchronization signal
;VI_VSYNC_FIELD = 0,
;VI_VSYNC_PULSE,
VsyncNeg=0 ;Polarity of the vertical synchronization signal
;VI_VSYNC_NEG_HIGH = 0,
;VI_VSYNC_NEG_LOW /*if VIU_VSYNC_E
Hsync =0 ;Attribute of the horizontal synchronization signal
;VI_HSYNC_VALID_SINGNAL = 0,
;VI_HSYNC_PULSE,
HsyncNeg =0 ;Polarity of the horizontal synchronization signal
;VI_HSYNC_NEG_HIGH = 0,
;VI_HSYNC_NEG_LOW
VsyncValid =0 ;Attribute of the valid vertical synchronization signal
;VI_VSYNC_NORM_PULSE = 0,
;VI_VSYNC_VALID_SINGAL,
VsyncValidNeg =0;Polarity of the valid vertical synchronization signal
;VI_VSYNC_VALID_NEG_HIGH = 0,
;VI_VSYNC_VALID_NEG_LOW
Timingblank_HsyncHfb =0 ;Horizontal front blanking width
Timingblank_HsyncAct =1280 ;Horizontal effetive width
Timingblank_HsyncHbb =0 ;Horizontal back blanking width
Timingblank_VsyncVfb =0 ;Vertical front blanking height
Timingblank_VsyncVact =720 ;Vertical effetive width
Timingblank_VsyncVbb=0 ;Vertical back blanking height
Timingblank_VsyncVbfb =0 ;Even-field vertical front blanking height(interlace, invalid progressive)
Timingblank_VsyncVbact=0 ;Even-field vertical effetive width(interlace, invalid progressive)
Timingblank_VsyncVbbb =0 ;Even-field vertical back blanking height(interlace, invalid progressive)
;----- only for bt656 ----------
FixCode =0 ;BT656_FIXCODE_1 = 0,
;BT656_FIXCODE_0
FieldPolar=0 ;BT656_FIELD_POLAR_STD = 0
;BT656_FIELD_POLAR_NSTD
DataPath =1 ;ISP enable or bypass
;VI_PATH_BYPASS = 0,/* ISP bypass */
;VI_PATH_ISP = 1,/* ISP enable */
;VI_PATH_RAW = 2,/* Capture raw data, for debug */
InputDataType=1 ;VI_DATA_TYPE_YUV = 0,VI_DATA_TYPE_RGB = 1,
DataRev =FALSE ;Data reverse. FALSE = 0; TRUE = 1
[vi_chn]
CapRect_X =0
CapRect_Y =0
CapRect_Width=1280
CapRect_Height=720
DestSize_Width=1280
DestSize_Height=720
CapSel =2 ;Frame/field select. ONLY used in interlaced mode
;VI_CAPSEL_TOP = 0, /* top field */
;VI_CAPSEL_BOTTOM, /* bottom field */
;VI_CAPSEL_BOTH, /* top and bottom field */
PixFormat =19 ;
SrcFrameRate=-1 ;Source frame rate. -1: not controll
FrameRate =-1 ;Target frame rate. -1: not controll
[vpss_group]
Vpss_DrEn =FALSE
Vpss_DbEn =FALSE
Vpss_IeEn =TRUE
Vpss_NrEn =TRUE
Vpss_HistEn =TRUE
Vpss_DieMode=0 ;Define de-interlace mode
;VPSS_DIE_MODE_AUTO = 0,
;VPSS_DIE_MODE_NODIE = 1,
;VPSS_DIE_MODE_DIE = 2,
[vpss_chn]
Vpss_W =1280
Vpss_H =720
[isp_image]
Isp_W =1280
Isp_H =720
Isp_FrameRate=30
Isp_Bayer =3 ;BAYER_RGGB=0, BAYER_GRBG=1, BAYER_GBRG=2, BAYER_BGGR=3
[isp_timing]
Isp_WndMode=0 ;WIND_NONE= 0,WIND_HOR= 1,WIND_VER= 2,WIND_ALL= 3,
Isp_HorWndStart=0
Isp_HorWndLength=1280
Isp_VerWndStart=0
Isp_VerWndLength=720
[vb_conf]
VbCnt=8
[venc]
RcMode =VENC_RC_MODE_H264CBR
Gop =30
StatTime =1
ViFrmRate =30
TargetFrmRate=25
;----- only for VENC_RC_MODE_H264CBR ----------
BitRate=4096
FluctuateLevel=1
;----- only for VENC_RC_MODE_H264VBR ----------
MaxBitRate =10000
MaxQp=32
MinQp=24
;----- only for VENC_RC_MODE_H264FIXQP ----------
IQp=20
PQp=23
[bind]
ViDev =0
ViChn =0
VpssGrp =0
VpssChn = 0
VencGrp =0
VencChn =0
VoDev =0
VoChn =0
ViSnapChn =0
VpssSnapGrp=0
VpssSnapChn=1
VencSnapGrp=1
VencSnapChn=1