HDLBits网站题目答案—第一波Started and Basics

目录

Getting Started

Output Zero

 Simple wire

Four wire

Inverter

AND gate

NOR gate

XNOR gate

Declaring wires

7458 chip

---

Getting Started

module top_module( output one );

// Insert your code here
    assign one = 1;

endmodule

Output Zero

module top_module(
    output zero
);// Module body starts after semicolon
assign zero = 1'b0;
endmodule

 Simple wire

module top_module( input in, output out );
assign out =in;
endmodule

Four wire

module top_module( 
    input a,b,c,
    output w,x,y,z );
    assign w = a;
    assign x = b;
    assign y = b; 
    assign z = c;
            
endmodule

Inverter

module top_module( input in, output out );
assign out = ~in;
endmodule

AND gate

module top_module( 
    input a, 
    input b, 
    output out );
assign out = a & b;
endmodule

NOR gate

module top_module( 
    input a, 
    input b, 
    output out );
    assign out = ~(a|b);
endmodule

XNOR gate

module top_module( 
    input a, 
    input b, 
    output out );
    assign out = a ^~ b;
endmodule

Declaring wires

`default_nettype none
module top_module(
    input a,
    input b,
    input c,
    input d,
    output out,
    output out_n   ); 
    wire ab_and,cd_and;
    assign ab_and = a & b;
    assign cd_and = c & d;
    assign out = ab_and | cd_and;
    assign out_n = ~out;
    

endmodule

7458 chip

module top_module ( 
    input p1a, p1b, p1c, p1d, p1e, p1f,
    output p1y,
    input p2a, p2b, p2c, p2d,
    output p2y );
    wire w0,w1,w2,w3;
    assign w0=p1a & p1b & p1c;
    assign w1=p1d & p1e & p1f;
    assign w2=p2a & p2b;
    assign w3=p2c & p2d;
    assign p1y=w0 | w1;
    assign p2y=w2 | w3;

endmodule