HDLBits刷题_Verilog Language_Always case2

A priority encoder is a combinational circuit that, when given an input bit vector, outputs the position of the first 1 bit in the vector. For example, a 8-bit priority encoder given the input 8'b10010000 would output 3'd4, because bit[4] is first bit that is high.

Build a 4-bit priority encoder. For this problem, if none of the input bits are high (i.e., input is zero), output zero. Note that a 4-bit number has 16 possible combinations.

// synthesis verilog_input_version verilog_2001
module top_module (
    input [3:0] in,
    output reg [1:0] pos  );
    always @(*)
    case(in)
        1,3,5,7,9,13,15: pos = 0;
        2,6,10,14: pos = 1;
        4,12: pos = 2;
        8: pos =3;
        default: pos = 0;
    endcase

endmodule