PLL Performance,Simulation and Design 4th学习笔记——Chapter1

Chapter1:基本PLL概述VCO:Voltage-Controlled Oscillator压控振荡器,对于给定的一个输入电压,输出特定频率的振荡信号。PLL:Phase-Locked Loops锁相环,输出特定频率,特定相位的振荡信号。基本PLL操作和术语基本模块基本模块输入输出传输函数说明XTAL-参考频率ϕref\phi_{ref}ϕref​-稳定的晶振提供输入参考频率(这里用相位,便于理解鉴相器)R Counterϕref\phi_{ref
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Chapter1:基本PLL概述

VCO:Voltage-Controlled Oscillator压控振荡器,对于给定的一个输入电压,输出特定频率的振荡信号。

PLL:Phase-Locked Loops锁相环,输出特定频率,特定相位的振荡信号。

基本PLL框架

基本PLL操作和术语

基本模块

基本模块 输入 输出 传输函数 说明
XTAL - 参考频率 ϕ r e f \phi_{ref} ϕref - 稳定的晶振提供输入参考频率(这里用相位,便于理解鉴相器)
R Counter ϕ r e f \phi_{ref} ϕref 比较频率 ϕ c o m p \phi_{comp} ϕcomp 1 R \frac{1}{R} R1 可选R分频器,适应不同输入频率需求
Phase Detector/Charge Pump ϕ c o m p \phi_{comp} ϕcomp ϕ d i v \phi_{div} ϕdiv 电流 I c p I_{cp} Icp K ϕ ( m A / 2 π ) K_\phi(mA/2\pi) Kϕ(mA/2π) 鉴相器对两输入信号的相位差进行比较,电荷泵输出与相位差成正比的电流
Loop Filter I c p I_{cp} Icp 控制电压 V c o n t V_{cont} Vcont Z ( s ) Z(s) Z(s) 环路滤波器,抑制控制电压上的高频波动,保证VCO的控制电压恒定
VCO V c o n t V_{cont} Vcont 输出频率 ϕ o
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PLL设计的经典书 简洁易懂,英文版 Table of Contents PLL BASICS ......................................................................................................................................................9 CHAPTER 1 BASIC PLL OVERVIEW ..................................................................................................................11 CHAPTER 2 THE CHARGE PUMP PLL WITH A PASSIVE LOOP FILTER............................................................15 CHAPTER 3 PHASE/FREQUENCY DETECTOR THEORETICAL OPERATION.......................................................17 CHAPTER 4 BASIC PRESCALER OPERATION .....................................................................................................25 CHAPTER 5 FUNDAMENTALS OF FRACTIONAL N PLLS ...................................................................................30 CHAPTER 6 DELTA SIGMA FRACTIONAL N PLLS ............................................................................................35 CHAPTER 7 THE PLL AS VIEWED FROM A SYSTEM LEVEL .............................................................................39 PLL PERFORMANCE AND SIMULATION................................................................................................45 CHAPTER 8 INTRODUCTION TO LOOP FILTER COEFFICIENTS.........................................................................47 CHAPTER 9 INTRODUCTION TO PLL TRANSFER FUNCTIONS AND NOTATION................................................52 CHAPTER 10 APPLICATIONS FOR PLL OTHER THAN A SIGNAL SOURCE........................................................58 CHAPTER 11 REFERENCE SPURS AND THEIR CAUSES ......................................................................................68 CHAPTER 12 FRACTIONAL SPURS AND THEIR CAUSES.....................................................................................81 CHAPTER 13 OTHER TYPES OF SPURS AND THEIR CAUSES.............................................................................96 CHAPTER 14 PLL PHASE NOISE MODELING AND BEHAVIOR........................................................................104 CHAPTER 15 INTEGRATED PHASE NOISE QUANTITIES...................................................................................116 CHAPTER 16 TRANSIENT RESPONSE OF PLL FREQUENCY SYNTHESIZERS ..................................................129 CHAPTER 17 IMPACT OF PFD DISCRETE SAMPLING EFFECTS ON LOCK TIME............................................142 CHAPTER 18 ROUTH STABILITY FOR PLL LOOP FILTERS ............................................................................152 CHAPTER 19 A SAMPLE PLL ANALYSIS.........................................................................................................157 PLL DESIGN .................................................................................................................................................171 CHAPTER 20 FUNDAMENTALS OF PLL PASSIVE LOOP FILTER DESIGN........................................................172 CHAPTER 21 EQUATIONS FOR A PASSIVE SECOND ORDER LOOP FILTER.....................................................177 CHAPTER 22 EQUATIONS FOR A PASSIVE THIRD ORDER LOOP FILTER........................................................181 CHAPTER 23 EQUATIONS FOR A PASSIVE FOURTH ORDER LOOP FILTER.....................................................189 CHAPTER 24 FUNDAMENTALS OF PLL ACTIVE LOOP FILTER DESIGN.........................................................199 CHAPTER 25 ACTIVE LOOP FILTER USING THE DIFFERENTIAL PHASE DETECTOR OUTPUTS ....................209 CHAPTER 26 IMPACT OF LOOP FILTER PARAMETERS AND FILTER ORDER ON REFERENCE SPURS............212 CHAPTER 27 OPTIMAL CHOICES FOR PHASE MARGIN AND GAMMA OPTIMIZATION PARAMETER ............220 CHAPTER 28 USING FASTLOCK AND CYCLE SLIP REDUCTION......................................................................228 CHAPTER 29 SWITCHED AND MULTIMODE LOOP FILTER DESIGN................................................................235 CHAPTER 30 DEALING WITH REAL-WORLD COMPONENTS...........................................................................239 CHAPTER 31 PARTIALLY INTEGRATED LOOP FILTERS..................................................................................243 ADDITIONAL TOPICS................................................................................................................................277 CHAPTER 32 LOCK DETECT CIRCUIT CONSTRUCTION AND ANALYSIS.........................................................279 CHAPTER 33 IMPEDANCE MATCHING ISSUES AND TECHNIQUES FOR PLLS .................................................286 CHAPTER 34 CRYSTAL OSCILLATORS AND VCOS .........................................................................................293 CHAPTER 35 OTHER PLL DESIGN AND PERFORMANCE ISSUES ....................................................................317 SUPPLEMENTAL INFORMATION...........................................................................................................325 CHAPTER 36 GLOSSARY AND ABBREVIATION LIST........................................................................................327 CHAPTER 37 REFERENCES..............................................................................................................................338 CHAPTER 38 USEFUL WEBSITES AND ONLINE RF TOOLS .............................................................................339
PLL(相位锁定环)是一种广泛应用于通信系统、时钟同步和信号处理领域的电路。PLL是一种反馈系统,可将输入信号的频率调整到期望的值,并将输出信号与参考信号具有稳定的相位关系。PLL的性能、仿真和设计都是非常重要的因素。 性能是衡量PLL质量的一个关键指标。一个性能良好的PLL应该具有高增益、低相位噪声、低抖动和良好的稳定性。增益决定了PLL的输入频率将如何调整,较高的增益可以更快地将输入频率锁定到期望的频率。相位噪声和抖动是指PLL输出信号的相位稳定性,这在许多应用中至关重要。稳定性是指PLL在面对噪声和干扰时的性能表现,一个稳定的PLL应该具有较高的容错能力和抗干扰能力。 仿真是在设计PLL时不可或缺的一项工作。通过仿真可以对PLL的各种工作条件和性能参数进行准确的分析和评估。常见的PLL仿真工具有SPICE、MATLAB和Verilog-A等。通过仿真可以预测PLL的输出性能,包括锁定时间、相位噪声和频率稳定性等,并帮助设计者优化PLL的参数和结构。 设计是实现一个满足特定要求的PLL的过程。在设计过程中,需要选择合适的锁相环类型、参考信号源、VCO(压控振荡器)参数和环路滤波器等。设计者需要根据应用需求和性能指标进行合理的设计取舍,以实现经济、高效和稳定的PLL。设计过程还包括布局和布线,以确保PLL的可靠性和抗干扰能力。 总之,PLL的性能、仿真和设计都是成功实现高品质PLL电路的重要因素。合理的性能要求、准确的仿真分析和精心的设计都将直接影响PLL的性能和可靠性。对于PLL的应用者和设计者而言,深入理解和掌握这些方面是必不可少的。
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