Exams/ece241 2013 q4 水库问题

module top_module (
    input clk,
    input reset,
    input [3:1] s,
    output fr3,
    output fr2,
    output fr1,
    output dfr
); 
    reg [2:0] fr;
    reg [2:0] next_fr;
    assign {fr3,fr2,fr1}=fr;
    
    always@(*) begin
        case(s)
            3'b000: next_fr=3'b111;
            3'b001: next_fr=3'b011;
            3'b011: next_fr=3'b001;
            3'b111: next_fr=3'b000;
        endcase
    end
    
    always@(posedge clk) begin
        if(reset) fr<=3'b111;
        else fr<=next_fr;
    end
    
    always@(posedge clk) begin
        if(reset) dfr<=1;
        else begin
        case(s)
            3'b000: dfr<=1;
            3'b111: dfr<=0;
            default: begin if(fr<next_fr) dfr<=1;
                else if(fr>next_fr) dfr<=0;
                else dfr<=dfr;
            end
        endcase
        end
    end
endmodule