hdlbits答案：Exams/m2014 q4g、Gates、7420、Truthtable1、Mt2015 eq2、Mt2015 q4a、Mt2015 q4b、Mt2015 q4、Ringer

Exams/m2014 q4g

module top_module (
    input in1,
    input in2,
    input in3,
    output out);
    assign out=in3^(~(in1^in2));
endmodule

Gates

Ok, let's try building several logic gates at the same time. Build a combinational circuit with two inputs, a and b.

There are 7 outputs, each with a logic gate driving it:

• out_and: a and b
• out_or: a or b
• out_xor: a xor b
• out_nand: a nand b
• out_nor: a nor b
• out_xnor: a xnor b
• out_anotb: a and-not b

module top_module( 
    input a, b,
    output out_and,
    output out_or,
    output out_xor,
    output out_nand,
    output out_nor,
    output out_xnor,
    output out_anotb
);
    assign out_and=a&b;
    assign out_or=a|b;
    assign out_xor=a^b;
    assign out_nand=~(a&b);
    assign out_nor=~(a|b);
    assign out_xnor=~(a^b);
    assign out_anotb=a&(~b);
endmodule

7420

The 7400-series integrated circuits are a series of digital chips with a few gates each. The 7420 is a chip with two 4-input NAND gates.

Create a module with the same functionality as the 7420 chip. It has 8 inputs and 2 outputs.

module top_module ( 
    input p1a, p1b, p1c, p1d,
    output p1y,
    input p2a, p2b, p2c, p2d,
    output p2y );

	assign p1y=~(p1a&p1b&p1c&p1d);
	assign p2y=~(p2d&p2c&p2b&p2a);
endmodule

Truthtable1

A Bit of Practice

Create a combinational circuit that implements the above truth table.

module top_module( 
    input x3,
    input x2,
    input x1,  // three inputs
    output f   // one output
);
always@(*)begin
	case({x3,x2,x1})
		3'b010: f=1;
		3'b011: f=1;
		3'b101: f=1;
		3'b111: f=1;
		default:
				f=0;
	endcase
end 
endmodule

Mt2015 eq2

Create a circuit that has two 2-bit inputs A[1:0] and B[1:0], and produces an output z. The value of z should be 1 if A = B, otherwise z should be 0.

module top_module ( input [1:0] A, input [1:0] B, output z ); 
    assign z=(A==B)?1'b1:1'b0;
endmodule

Mt2015 q4a

Module A is supposed to implement the function z = (x^y) & x. Implement this module.

module top_module (input x, input y, output z);
    assign z=(x^y)&x;
endmodule

Mt2015 q4b

module top_module ( input x, input y, output z );
    assign z=~(x^y);
endmodule

Mt2015 q4

 这道题我觉得描述的不是特别清楚，所以刚开始以为4个小模块是加法器，但是题干说的是使用上面两道题的电路，所以，抄下来，直接例化就可以使用，因为直接写一起了，所以这个逻辑看着很绕，但是就是上面的两道题的逻辑。

module top_module (input x, input y, output z);
    assign z=(((x^y)&x)|(~(x^y)))^(((x^y)&x )&(~(x^y)));
endmodule

Ringer

Suppose you are designing a circuit to control a cellphone's ringer and vibration motor. Whenever the phone needs to ring from an incoming call (), your circuit must either turn on the ringer () or the motor (), but not both. If the phone is in vibrate mode (), turn on the motor. Otherwise, turn on the ringer. input ringoutput ringer = 1output motor = 1input vibrate_mode = 1

 这道题应该是完整的自己提取需求和逻辑，实现功能，vibrate mode 可以看作是模式开关。

module top_module (
    input ring,
    input vibrate_mode,
    output ringer,       // Make sound
    output motor         // Vibrate
);

always@(*)begin
	if(vibrate_mode==1'b1)begin
		motor=ring;
		ringer=0;
	end 
	else begin 
		ringer=ring;
		motor=0;
	end  
end 
endmodule