HDLbits 刷题 -- Module name

This problem is similar to module. You are given a module named mod_a that has 2 outputs and 4 inputs, in some order. You must connect the 6 ports by name to your top-level module's ports:

You are given the following module:

module mod_a ( output out1, output out2, input in1, input in2, input in3, input in4);

译:这个问题类似于模块。给定一个名为mod_a的模块，该模块以某种顺序具有2个输出和4个输入。你必须按名称将这6个端口连接到顶层模块的端口:

您将获得以下模块:

module mod_a ( output out1, output out2, input in1, input in2, input in3, input in4);

module top_module ( 
    input a, 
    input b, 
    input c,
    input d,
    output out1,
    output out2
);
    mod_a (.out1(out1),.out2(out2),.in1(a),.in2(b),.in3(c),.in4(d));
endmodule

运行结果: