A priority encoder is a combinational circuit that, when given an input bit vector, outputs the position of the first 1 bit in the vector. For example, a 8-bit priority encoder given the input 8'b10010000 would output 3'd4, because bit[4] is first bit that is high.
Build a 4-bit priority encoder. For this problem, if none of the input bits are high (i.e., input is zero), output zero. Note that a 4-bit number has 16 possible combinations.
译:
优先编码器是一种组合逻辑电路,当给定一个输入位向量时,它会输出向量中第一个1位的位置。例如,一个8位的优先编码器给定输入8'b10010000将会输出3'd4,因为bit[4]是第一个高电平的位。
构建一个4位的优先编码器。对于这个问题,如果输入位没有一个是高电平的(即输入为零),则输出零。注意,一个4位的数字有16种可能的组合。
// synthesis verilog_input_version verilog_2001
module top_module (
input [3:0] in,
output reg [1:0] pos );
always@(*)begin
case(1)
in[0]:pos = 0;
in[1]:pos = 1;
in[2]:pos = 2;
in[3]:pos = 3;
default: pos = 0;
endcase
end
endmodule
运行结果: