直接贴代码就能跑,然后配置引脚,注意地这里对系统时钟二分频
核心思想是创建一个每一秒变化一次的count2计数器值。
- 27000000=206 * 1024 * 128;这里计206*2的17次方次数就等于一秒,所以创建一个count1来输出时钟clk_206T0,每206个系统时钟周期变化一次高低电平。然后再进行16分频(系统时钟初始化我二分频了),则全1时刚好经过一秒,这里取前八位比较时间也差不多。
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module led( input clk_in, input btn_rst, //注意开发板s1s2丝印相反了 output reg [5:0] led ); reg[23:0] counter;//定义一个寄存器类型的计数器 reg [8:0] pwm_counter; wire clk_div; reg [6:0] counter1; reg clk_206T0; Gowin_CLKDIV clkdiv_inst( .clkout(clk_div), //output clkout .hclkin(clk_in), //input hclkin .resetn(btn_rst) //input resetn ); //27000000=206 * 1024 * 128; always @(posedge clk_div or negedge btn_rst) begin if (!btn_rst) begin counter1 <= 0; clk_206T0 <=0; end else begin if (counter1 >= 102) begin counter1 <= 0; clk_206T0 <= ~clk_206T0; end else begin counter1 <= counter1 + 1'b1; end end end reg [16:0] counter2; reg flag; always @(posedge clk_206T0 or negedge btn_rst) begin if(!btn_rst)begin counter2 <= 16'd0; flag <= 0; end else if(counter2 < 16'hFFFF &&flag == 0) begin counter2 <= counter2 + 1'd1; end else if(counter2 == 16'hFFFF&& flag == 0) begin flag <= 1; end else if(flag == 1 && counter2 > 0) begin counter2 <= counter2 - 1'd1; end else if(flag == 1 && counter2 == 0) begin flag <= 0; counter2 <= counter2 + 1'd1; end end wire [7:0] pulse_width = counter2[16:9]; //17分频是[0:17],这里因为已经对输入时钟二分频,所以采用对count2 16分频即可 always @(posedge clk_div or negedge btn_rst) begin if(!btn_rst)begin led<=6'b000000; //这里左为高位,板上led最左边为低位的led pwm_counter <=8'b0; end else begin pwm_counter <= pwm_counter + 1'b1; if(pwm_counter < pulse_width)begin //每一次全0到全1代表几乎过去一秒 //led<=6'b111111;//灭 led<=6'b000000; end else begin //led<=6'b000000; //这里左为高位,板上led最左边为低位的led led<=6'b111111;//灭,pwm比counter大 end end end endmodule