注意:以下是本人学习笔记,如有错误可以留言指出。
在一秒的时间内,前0.5s为低电平,后0.5s为高电平,系统时钟为50MHZ
编写程序:
module counter_jsq
#(
parameter CNT_MAX = 25'd2499_9999
)
(
input wire clk,
input wire rst,
output reg out
);
reg [24:0] cnt;
always@(posedge clk or negedge rst)
if(rst == 1'b0)
cnt <= 25'd0;
else if(cnt == CNT_MAX)
cnt <= 25'd0;
else
cnt <= cnt + 25'd1;
always@(posedge clk or negedge rst)
if(rst == 1'b0)
out <= 1'b0;
else if(cnt == CNT_MAX)
out <= ~out;
else
out <= out;
endmodule
仿真程序:
`timescale 1ns / 1ns
module counter_jsq_tb;
reg clk;
reg rst;
wire out;
counter_jsq
#(
.CNT_MAX (10'd9)
)
counter_jsq_tb
(
.clk (clk),
.rst (rst),
.out (out)
);
initial
begin
clk = 1'b0;
rst <= 1'b0;
#10
rst <= 1'b1;
end
always #10 clk = ~clk;
endmodule
因为cnt计数到2499_9999不利于仿真观察,把CNT_MAX设置成了10‘d9,这样有利于观察。
仿真波形: