module top_module(
input clk,
input [7:0] in,
input reset, // Synchronous reset
output done); //
parameter [1:0] s0=00,//
s1=01,//
s2=11,
s3=10;
reg [1:0] state,next_state;
always @(*) begin
case(state)
s0:next_state = in[3]?s1:s0;
s1:next_state = s2;
s2:next_state = s3;
s3:next_state = in[3]?s1:s0;
endcase
end
always @(posedge clk) begin
if(reset) begin
state<=s0;
end
else begin
state <= next_state;
end
end
assign done = (state==s3)?1:0;
endmodule
HDLBits_Fsm PS2Mouse
最新推荐文章于 2024-07-09 12:00:39 发布