动态配置接口DRP(Dynamic Reconfiguration Port)

---

Introduction

Reconfiguration of MMCM or PLL is performed through the DRP. The DRP provides access to the configuration bits that would normally only be initialized in the bitstream. This allows the user to dynamically change the MMCM or PLL clock outputs without loading a new bitstream. The MMCM or PLL must be held in reset during dynamic reconfiguration or must be reset after the dynamic reconfiguration changes have completed. Frequency, phase, and duty cycle can all be changed.

---

提示：以下是本篇文章正文内容，下面案例可供参考

一、DRP 寄存器

对于MMCM的时钟输出，总共有17个寄存器需要配置。对于CLKOUT[6:0] 和CLKFBOUT 8个时钟，每个时钟由两个寄存器进行配置，每个寄存器长度为16bit，每个寄存器具体意义见用户手册。