Vdsat、Vov、Vds联系与区别

Vov:过驱动电压overdrive voltage,Vov=Vgs-Vth,过驱动电压也用Vod表示

Vdsat:饱和漏源电压或夹断时漏源电压(刚出现夹断)saturation drain voltage

在长沟道下,vdsat=vgs-vth=vov,在短沟道下,由于二阶效应,vdsat小于vgs-vth,但这个值,spice也好,spectre也好,都是用来判断管子工作区间的。

vds>vdsat管子工作在饱和区
vds<vdsat管子工作在线性区

Vov=Vgs-Vth,用MOS的Level 1 Model时,不考虑短沟道效用,Vdsat=Vov=Vgs-Vth,当Vds>Vdsat时,MOS的沟道就出现Pich-off现象,这时候电流开始饱和。(长沟道器件)

但是考虑到短沟道效应的模型里,沟道里的多子因为速度饱和效应(Velocity saturation),Vds不需要到达Vov,只要到达Vdsat,Ids就会饱和,不会再上升。但是此时在物理上,沟道并未达到Pinch- off,直到Vds=Vov,沟道的Pinch-off现象才会出现。也就是说在短沟道模型中,器件在沟道Pinch-off之前就会达到速度饱和,电流 不会再增加(短沟道器件)

小结: Vds-Vdsat要留一定余量,一般200mv,差分输入对一般为100多mv,一般来说vdsat<50mV管子基本就工作在线性区;一是怕管子由于工艺进入线性区;二是饱和区边缘rds较小。

有关Vdsat、Vov、Vds


附英文解释:

Q:

We can see the parameter Vdsat in Cadence Spectre after we perform. the DC simulation. But I can’t figure out what’s the physical meaning of it?

I guess the vdsat is the overdrive voltage at first, but it’s not exact the same as Vgs-Vth. The Vdsat is smaller than Vgs-Vth. So anyone has the idea what is Vdsat is the saturation drain voltage.

for a long channel device, Vdsat almost equal to Vgs- Vth ( Vdsat = Vgs -Vth).

in strong inversion region(Vgs>Vth): NMOSFET works in linear region when 0<<Vgs -Vth ), the inversion channel behaves like a simple resistor. The drain current Ids increases linearly as the drain voltage Vds increases. However, when Vds is larger it will cause an increase of the voltage in the inversion layer at all points along the channel (except for the singular point at the source edge). This reduces the voltage across the gate capacitor and the inversion charge density is reduced. The smaller amount of mobile inversion charges results in a decrease in channel conductance, which leads to a smaller slope in the Ids -Vds characteristics as Vds increases. Eventually, Vds reaches the saturation voltage Vdsat , at which point the mobile carriers at the drain side disappear in this first order model, and the channel is “pinched off” at the drain side [2.4, 2.6]. The condition of no mobile carriers at the pinch-off point has traditionally been used to obtain the analytical saturation voltage expressions for long channel compact models.

NMOSFET works in saturation region when VdsatVdsat, the pinched-off region of the channel increases and extends towards the source. The excess drain voltage beyond Vdsat will drop across this pinched-off region and the drain current remains approximately constant. However, we need to point out that the constant saturation current behavior. is only an approximation. The small but non-zero slope of the Ids -Vds characteristics in the saturation region is very important to analog circuit performance and must be accurately modeled by a compact model. In addition to the finite length of the pinch-off region (channel length modulation), drain induced barrier lowering and substrate current induced body effect must be accounted for in modeling the current in the saturation region.

for a short channel device, Vdsat = (Vgs -Vth)/(L*Esat)

so the device enters saturation before Vds reaches Vgs – Vth and operates more often in saturation.

critical gate voltage, at which an inversion layer is formed, is called the threshold voltage (Vth ).When the voltage between the gate and source, Vgs , is larger than Vth by several times the thermal voltage vt (KBT/q), the device is said to be in the strong inversion regime. When Vgs=Vdd (the power supply voltage), the device is in the “on” state. When Vgs is less than Vth , the device is in the subthreshold (or weak inversion) regime. When Vgs = 0, the device is in the “off” state. When Vgs is biased near Vth , the device operates in the moderate inversion egime,which is an important operation region in low power analog applications.

***REFERENCE***1. MOSFET Modeling and BSIM3 user’s Guide, 1999.

转载自《Vdsat、Vov、Vds联系与区别》,作者:太空

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以下是一个简单的nmos晶体管的verilog-a代码示例: ``` `timescale 1ns / 1ps module nmos(vds, vgs, ids, w, l, tox, nsub, vth); // Define parameters parameter real mu_n = 0.05; parameter real eps_ox = 3.9; parameter real eps_0 = 8.854e-14; parameter real q = 1.602e-19; // Define local variables real vdsat, vov, idsat, lambda, cox, cgso, cgdo, cgs, cgd, gm, gds, vth0, id, vgs_eff; // Compute effective gate-source voltage vgs_eff = vgs - ids * rsh; // Compute threshold voltage vth0 = vth + 2 * phi_f + gamma * sqrt(2 * phi_f); // Compute saturation voltage vdsat = vgs_eff - vth0; // Compute overdrive voltage vov = vgs_eff - vth0; // Compute saturation current lambda = 1 / (lambd * l); idsat = w * mu_n * cox * (vov - 0.5 * lambda * vdsat) * vdsat; // Compute channel length modulation gm = w * mu_n * cox * (vgs_eff - vth0); gds = w * mu_n * cox * lambda * gm * vdsat; id = idsat * (1 + lambda * vds); // Compute gate-source capacitance cgso = (eps_0 * eps_ox * w / tox) / (1 + cgdo / cgso); cgs = cgso + cgd; // Compute drain-source capacitance cgdo = (eps_0 * eps_ox * w / tox) / (1 + cgso / cgdo); cgd = cgdo + cgs; // Assign output ids = id; endmodule ``` 在这里,我们使用了一些常见的参数和变量来建模nmos晶体管,包括: - vds: 漏极-源极电压 - vgs: 栅极-源极电压 - ids: 漏极电流 - w: 晶体管宽度 - l: 晶体管长度 - tox: 氧化物厚度 - nsub: 衬底材料的掺杂浓度 - vth: 阈值电压 - mu_n: 电子迁移率 - eps_ox: 氧化物介电常数 - eps_0: 真空介电常数 - q: 电荷量 - vdsat: 饱和电压 - vov: 过剩电压 - idsat: 饱和电流 - lambda: 通道长度调制系数 - cox: 氧化物电容 - cgso: 栅源电容 - cgdo: 栅漏电容 - cgs: 总的栅源电容 - cgd: 总的栅漏电容 - gm: 转导电阻 - gds: 输出电导 以上代码可能需要根据具体的模型参数进行一些调整,但是可以作为一个起点来帮助你开始建模nmos晶体管。
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