3 自研rk3566/rk3588+rgbd相机之linux-mipi-camera设备驱动程序开发
1 linux-mipi-camera驱动介绍
mipi-camera驱动程序是用来识别并驱动mipi接口的相机的设备驱动程序,其驱动程序挂载到media/i2c下属于多媒体设备,同时由i2c总线驱动,符合linux设备驱动的总线-设备-驱动模型,即mipi-camera设备挂载到i2c总线上,并通过总线与驱动程序相匹配。
开发流程通常是,配置好设备树后,内核通过设备树找到设备并与驱动匹配,加载驱动文件,设备驱动程序probe函数执行设备树解析,通过i2c写入sensor设定点亮模组,配置时钟,powerdown,reset引脚启动sensor到工作状态。sensor正常出图,图像从内核空间通过内存映射到用户空间。完成驱动出图任务。
2 mipi-camera驱动调试及注意事项总结
需要开发的驱动文件内容:
kernel/drivers/media/i2c/Makefile
kernel/drivers/media/i2c/Kconfig
kernel/drivers/media/i2c/s5k33d_48.c
kernel/drivers/media/i2c/sc2310.c
I2C时钟频率配置总结:
1 7位地址 ,原来20,改10
2 时钟频率 400K,I2C新增配置
3 上升下降时间
4 3568.dtsi, 2772行改为M1
5 新增时钟power-domains = <&power RK3568_PD_VI>;
在参考手册common->camera->rockchip_driver_guide_vi_cn.pdf
内核调试打印:
1 内核打印级别,echo 7 >/proc/sys/kernel/printk, 调用V4L2时也会打印
2 可以通过用户空间调用I2C的write_reg_array, 并且读写正常,通过手机拍摄模组发现有短暂的红外光发出,说明用户空间调用和模组初始化生效
mipi时钟信号调试总结:
1 示波器分别测试i2c-scl/sda,mclk,mipi-dn0,发现I2C读写正常,MCLK,只在读写时有信号。
2 测试MCLK,发现在初始化 s5k33d_s_power函数返回后,MCLK时钟信号断掉。测试MIPI信号中断。
3 后通过示波器测试发现i2c发送stream on后有多余写入操作导致sensor停止。
像素时钟参数计算总结:
图像时钟调试:
1 hblanking time = line_lenght_pck-x_output_size
Vblanking time = (frame_length_lines-y_output_size)line_length_pck
Frame rate = vt_pix_clk_freq_mhz/(frame_length_linesline_length_pck)
Frame_length_lines 0340,0e82=3714,寄存器读出
Line_length_pck 0342,0a18=2584,寄存器读出
Vt_pix_clk_freq_mhz = 288000000
Frame rate = 288000000/(3714x2584)
正确的调整方法:
1 LINK_FREQ:实际的MIPI频率除lane数
2 PIXEL_RATE:LINK_FREQ x 2 x 2 lane / 10 pixel_per_bit
3 tof sensor linux mipi-camera驱动程序详解
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/version.h>
#include <linux/rk-camera-module.h>
#include <media/media-entity.h>
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-subdev.h>
#include <linux/pinctrl/consumer.h>
#include <media/v4l2-ioctl.h>
#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x03)
#ifndef V4L2_CID_DIGITAL_GAIN
#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
#endif
#if 0
#define S5K33D_LINK_FREQ_1600MHZ 800000000
#define S5K33D_PIXEL_RATE 320000000 //(S5K33D_LINK_FREQ_1600MHZ * 2 * 2 / 10)
#define S5K33D_XVCLK_FREQ 16000000
#else
#define S5K33D_LINK_FREQ_1600MHZ 399000000
#define S5K33D_PIXEL_RATE 159600000 //(S5K33D_LINK_FREQ_1600MHZ * 2 * 2 / 10)
#define S5K33D_XVCLK_FREQ 24000000 //16000000 //date 21-08-13
#endif
#define CHIP_ID 0x303d
#define S5K33D_REG_CHIP_ID 0x0
#define S5K33D_REG_ID_VALUE 0x303d
#define S5K33D_VENDOR_I2C_ADDR 0x20
#define S5K33D_REG_CTRL_MODE 0x0100
#define S5K33D_MODE_SW_STANDBY 0x0 //??
#define S5K33D_MODE_STREAMING 0x0100//??
#define S5K33D_REG_EXPOSURE 0x0202 //0x3500 //??
#define S5K33D_EXPOSURE_MIN 4 //??
#define S5K33D_EXPOSURE_STEP 1 //??
#define S5K33D_VTS_MAX 0x7fff //??
#define S5K33D_REG_GAIN_H 0x0204 //0x350a
#define S5K33D_REG_GAIN_L 0x0205 //0x350b
#define S5K33D_GAIN_H_MASK 0x07
#define S5K33D_GAIN_H_SHIFT 8
#define S5K33D_GAIN_L_MASK 0xff
#define S5K33D_GAIN_MIN 0x10
#define S5K33D_GAIN_MAX 0xf8
#define S5K33D_GAIN_STEP 1
#define S5K33D_GAIN_DEFAULT 0x10
#define S5K33D_REG_TEST_PATTERN 0x5e00
#define S5K33D_TEST_PATTERN_ENABLE 0x80
#define S5K33D_TEST_PATTERN_DISABLE 0x0
#define S5K33D_REG_VTS 0x0340 //0x380e
#define REG_NULL 0xFFFF
#define S5K33D_REG_VALUE_08BIT 1
#define S5K33D_REG_VALUE_16BIT 2
#define S5K33D_REG_VALUE_24BIT 3
#define S5K33D_LANES 2
#define S5K33D_BITS_PER_SAMPLE 10
#define S5K33D_CHIP_REVISION_REG 0x0002
#define S5K33D_R1A 0xb1
#define S5K33D_R2A 0xb2
#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
#define S5K33D_NAME "s5k33d"
static DEFINE_MUTEX(s5k33d_power_mutex);
static int s5k33d_power_count;
static const struct regval *s5k33d_global_regs;
static const char * const s5k33d_supply_names[] = {
"avdd", /* Analog power */
"dovdd", /* Digital I/O power */
"dvdd", /* Digital core power */
};
#define S5K33D_NUM_SUPPLIES ARRAY_SIZE(s5k33d_supply_names)
struct regval {
u16 addr;
u16 val;
};
struct s5k33d_mode {
u32 width;
u32 height;
struct v4l2_fract max_fps;
u32 hts_def;
u32 vts_def;
u32 exp_def;
const struct regval *reg_list;
};
struct s5k33d {
struct i2c_client *client;
struct clk *xvclk;
struct gpio_desc *mipi_pwr_gpio;//date 21-08-13
struct gpio_desc *reset_gpio;
struct gpio_desc *pwdn_gpio;
struct gpio_desc *reset2_gpio;
struct gpio_desc *pwdn2_gpio;
struct regulator_bulk_data supplies[S5K33D_NUM_SUPPLIES];
struct pinctrl *pinctrl;
struct pinctrl_state *pins_default;
struct pinctrl_state *pins_sleep;
struct v4l2_subdev subdev;
struct media_pad pad;
struct v4l2_ctrl_handler ctrl_handler;
struct v4l2_ctrl *exposure;
struct v4l2_ctrl *anal_gain;
struct v4l2_ctrl *digi_gain;
struct v4l2_ctrl *hblank;
struct v4l2_ctrl *vblank;
struct v4l2_ctrl *test_pattern;
struct mutex mutex;
bool streaming;
bool power_on;
const struct s5k33d_mode *cur_mode;
u32 module_index;
const char *module_facing;
const char *module_name;
const char *len_name;
};
static struct s5k33d *s5k33d_master;
#define to_s5k33d(sd) container_of(sd, struct s5k33d, subdev)
static const struct regval s5k33d_global_regs_r1a[] = {
{0x6010,0x0001},
{0xFCFC,0x4000},
{0x6028,0x4000},
{0x6214,0xF970},
{0x6218,0xF950},
{0x001E,0x5E62},
{0x0136,0x1800},
{0x6028,0x2000},
{0x602A,0x36C0},
{0x6F12,0x0649},
{0x6F12,0x0548},
{0x6F12,0xC1F8},
{0x6F12,0x3805},
{0x6F12,0x0549},
{0x6F12,0x081A},
{0x6F12,0x0349},
{0x6F12,0xA1F8},
{0x6F12,0x3C05},
{0x6F12,0x00F0},
{0x6F12,0x94BE},
{0x6F12,0x0000},
{0x6F12,0x2000},
{0x6F12,0x4740},
{0x6F12,0x2000},
{0x6F12,0x2210},
{0x6F12,0x2000},
{0x6F12,0x6C00},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x30B5},
{0x6F12,0xFF4B},
{0x6F12,0x0124},
{0x6F12,0x0020},
{0x6F12,0x5978},
{0x6F12,0x1B78},
{0x6F12,0x04FA},
{0x6F12,0x01F2},
{0x6F12,0x5110},
{0x6F12,0x5B1E},
{0x6F12,0x04FA},
{0x6F12,0x03F2},
{0x6F12,0xFA4B},
{0x6F12,0x02F0},
{0x6F12,0x0F02},
{0x6F12,0x1A80},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x5C88},
{0x6F12,0x0025},
{0x6F12,0x1D80},
{0x6F12,0xA3F2},
{0x6F12,0x0A23},
{0x6F12,0x0C42},
{0x6F12,0x00D0},
{0x6F12,0x8020},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x4000},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x2000},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x1000},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x0800},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x0400},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C42},
{0x6F12,0xA3F8},
{0x6F12,0x0A52},
{0x6F12,0x0C42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x0200},
{0x6F12,0xA3F8},
{0x6F12,0x0A22},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0x00BF},
{0x6F12,0xB3F8},
{0x6F12,0x0C22},
{0x6F12,0x0A42},
{0x6F12,0x01D0},
{0x6F12,0x40F0},
{0x6F12,0x0100},
{0x6F12,0xC0B2},
{0x6F12,0x30BD},
{0x6F12,0xF8B5},
{0x6F12,0xC248},
{0x6F12,0x0022},
{0x6F12,0x4068},
{0x6F12,0x86B2},
{0x6F12,0x050C},
{0x6F12,0x3146},
{0x6F12,0x2846},
{0x6F12,0x00F0},
{0x6F12,0xB2FE},
{0x6F12,0x00F0},
{0x6F12,0xB5FE},
{0x6F12,0xBA4C},
{0x6F12,0xEA3C},
{0x6F12,0x94F8},
{0x6F12,0x0F01},
{0x6F12,0x18B3},
{0x6F12,0x0120},
{0x6F12,0x0090},
{0x6F12,0x04F1},
{0x6F12,0x4803},
{0x6F12,0x94F8},
{0x6F12,0x4310},
{0x6F12,0xA3F1},
{0x6F12,0x1200},
{0x6F12,0xD4F8},
{0x6F12,0x8020},
{0x6F12,0x00F0},
{0x6F12,0xA9FE},
{0x6F12,0x0122},
{0x6F12,0x1103},
{0x6F12,0x46F2},
{0x6F12,0x0E20},
{0x6F12,0x00F0},
{0x6F12,0x99FE},
{0x6F12,0x00F0},
{0x6F12,0xA6FE},
{0x6F12,0xD4F8},
{0x6F12,0x3442},
{0x6F12,0x00F0},
{0x6F12,0xA7FE},
{0x6F12,0x8442},
{0x6F12,0x02D9},
{0x6F12,0x201A},
{0x6F12,0x00F0},
{0x6F12,0xA7FE},
{0x6F12,0x0022},
{0x6F12,0x4FF4},
{0x6F12,0x0041},
{0x6F12,0x46F2},
{0x6F12,0x1820},
{0x6F12,0x00F0},
{0x6F12,0x87FE},
{0x6F12,0x3146},
{0x6F12,0x2846},
{0x6F12,0xBDE8},
{0x6F12,0xF840},
{0x6F12,0x0122},
{0x6F12,0x00F0},
{0x6F12,0x80BE},
{0x6F12,0x7CB5},
{0x6F12,0xA44E},
{0x6F12,0x3C36},
{0x6F12,0x96F8},
{0x6F12,0x2A00},
{0x6F12,0x0128},
{0x6F12,0x01D0},
{0x6F12,0x0020},
{0x6F12,0x7CBD},
{0x6F12,0x0220},
{0x6F12,0x86F8},
{0x6F12,0x2A00},
{0x6F12,0x3488},
{0x6F12,0x04B9},
{0x6F12,0x1024},
{0x6F12,0x3589},
{0x6F12,0x6A46},
{0x6F12,0xE8B2},
{0x6F12,0x0121},
{0x6F12,0x00F0},
{0x6F12,0x89FE},
{0x6F12,0x7089},
{0x6F12,0x9DF8},
{0x6F12,0x0010},
{0x6F12,0x0840},
{0x6F12,0x8DF8},
{0x6F12,0x0000},
{0x6F12,0xB189},
{0x6F12,0x8142},
{0x6F12,0x03D0},
{0x6F12,0x641E},
{0x6F12,0x2404},
{0x6F12,0x240C},
{0x6F12,0xEDD1},
{0x6F12,0x0020},
{0x6F12,0x944D},
{0x6F12,0x86F8},
{0x6F12,0x2A00},
{0x6F12,0x9DF8},
{0x6F12,0x0000},
{0x6F12,0xB5F8},
{0x6F12,0x9810},
{0x6F12,0x0140},
{0x6F12,0x00D0},
{0x6F12,0x0121},
{0x6F12,0xB5F8},
{0x6F12,0x9A20},
{0x6F12,0x0242},
{0x6F12,0x01D0},
{0x6F12,0x0120},
{0x6F12,0x00E0},
{0x6F12,0x0020},
{0x6F12,0x0143},
{0x6F12,0x02D0},
{0x6F12,0x4FF6},
{0x6F12,0xFF70},
{0x6F12,0x7CBD},
{0x6F12,0x96F8},
{0x6F12,0x2500},
{0x6F12,0xB5F8},
{0x6F12,0x9440},
{0x6F12,0x0128},
{0x6F12,0x04D9},
{0x6F12,0xE0B2},
{0x6F12,0x01AA},
{0x6F12,0x0121},
{0x6F12,0x00F0},
{0x6F12,0x5AFE},
{0x6F12,0xE0B2},
{0x6F12,0x01AA},
{0x6F12,0x0221},
{0x6F12,0x00F0},
{0x6F12,0x55FE},
{0x6F12,0x9DF8},
{0x6F12,0x0500},
{0x6F12,0x9DF8},
{0x6F12,0x0410},
{0x6F12,0x00EB},
{0x6F12,0x0120},
{0x6F12,0xB5F8},
{0x6F12,0x9610},
{0x6F12,0x80B2},
{0x6F12,0x0140},
{0x6F12,0xF089},
{0x6F12,0x0A01},
{0x6F12,0x00B9},
{0x6F12,0x0120},
{0x6F12,0x318A},
{0x6F12,0x01B9},
{0x6F12,0x0121},
{0x6F12,0x738A},
{0x6F12,0xD21A},
{0x6F12,0x4243},
{0x6F12,0xB2FB},
{0x6F12,0xF1F0},
{0x6F12,0x80B2},
{0x6F12,0x3085},
{0x6F12,0x0009},
{0x6F12,0x7CBD},
{0x6F12,0xF8B5},
{0x6F12,0x7348},
{0x6F12,0x724C},
{0x6F12,0xB0F8},
{0x6F12,0x9400},
{0x6F12,0x3C34},
{0x6F12,0xA0F5},
{0x6F12,0x7F41},
{0x6F12,0xFF39},
{0x6F12,0x03D1},
{0x6F12,0x0020},
{0x6F12,0x84F8},
{0x6F12,0x2A00},
{0x6F12,0xF8BD},
{0x6F12,0xE078},
{0x6F12,0x6A46},
{0x6F12,0xC5B2},
{0x6F12,0x0121},
{0x6F12,0x2846},
{0x6F12,0x00F0},
{0x6F12,0x26FE},
{0x6F12,0x9DF8},
{0x6F12,0x0010},
{0x6F12,0x6079},
{0x6F12,0x8143},
{0x6F12,0xE079},
{0x6F12,0x0843},
{0x6F12,0xC6B2},
{0x6F12,0x6348},
{0x6F12,0x0721},
{0x6F12,0xEA38},
{0x6F12,0x90F8},
{0x6F12,0xEB00},
{0x6F12,0x00F0},
{0x6F12,0x1DFE},
{0x6F12,0x3146},
{0x6F12,0x2846},
{0x6F12,0x00F0},
{0x6F12,0x1EFE},
{0x6F12,0x0120},
{0x6F12,0x84F8},
{0x6F12,0x2A00},
{0x6F12,0x6048},
{0x6F12,0x0078},
{0x6F12,0x0228},
{0x6F12,0x02D0},
{0x6F12,0xFFF7},
{0x6F12,0x6DFF},
{0x6F12,0xF8BD},
{0x6F12,0x5848},
{0x6F12,0xEA38},
{0x6F12,0xB0F8},
{0x6F12,0x6204},
{0x6F12,0xF8BD},
{0x6F12,0x70B5},
{0x6F12,0x5748},
{0x6F12,0x0022},
{0x6F12,0xC168},
{0x6F12,0x0C0C},
{0x6F12,0x8DB2},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xDDFD},
{0x6F12,0x00F0},
{0x6F12,0x08FE},
{0x6F12,0x0122},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xD6FD},
{0x6F12,0x5148},
{0x6F12,0x0078},
{0x6F12,0x0228},
{0x6F12,0x0BD1},
{0x6F12,0x4D48},
{0x6F12,0x3C30},
{0x6F12,0x90F8},
{0x6F12,0x2A00},
{0x6F12,0x0128},
{0x6F12,0x05D1},
{0x6F12,0xFFF7},
{0x6F12,0x4AFF},
{0x6F12,0x4749},
{0x6F12,0xEA39},
{0x6F12,0xA1F8},
{0x6F12,0x6204},
{0x6F12,0x70BD},
{0x6F12,0x2DE9},
{0x6F12,0xF041},
{0x6F12,0x8046},
{0x6F12,0x4548},
{0x6F12,0x1546},
{0x6F12,0x0E46},
{0x6F12,0x0369},
{0x6F12,0x0022},
{0x6F12,0x1C0C},
{0x6F12,0x9FB2},
{0x6F12,0x3946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xB7FD},
{0x6F12,0x2A46},
{0x6F12,0x3146},
{0x6F12,0x4046},
{0x6F12,0x00F0},
{0x6F12,0xE4FD},
{0x6F12,0x0122},
{0x6F12,0x3946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xADFD},
{0x6F12,0x3E4D},
{0x6F12,0x3848},
{0x6F12,0x3A4A},
{0x6F12,0xEA38},
{0x6F12,0x2968},
{0x6F12,0x90F8},
{0x6F12,0x6404},
{0x6F12,0x3C32},
{0x6F12,0x81F8},
{0x6F12,0xC000},
{0x6F12,0x3A49},
{0x6F12,0x0968},
{0x6F12,0x81F8},
{0x6F12,0xB600},
{0x6F12,0x92F8},
{0x6F12,0x2400},
{0x6F12,0x48B1},
{0x6F12,0x918D},
{0x6F12,0x6868},
{0x6F12,0x0B0A},
{0x6F12,0x00F8},
{0x6F12,0x743F},
{0x6F12,0x8170},
{0x6F12,0xD18D},
{0x6F12,0x0B0A},
{0x6F12,0x0372},
{0x6F12,0x8172},
{0x6F12,0x6B68},
{0x6F12,0xAA20},
{0x6F12,0x2D49},
{0x6F12,0x03F8},
{0x6F12,0xCB0F},
{0x6F12,0xCC20},
{0x6F12,0x5870},
{0x6F12,0xA520},
{0x6F12,0x9870},
{0x6F12,0x0020},
{0x6F12,0xD870},
{0x6F12,0x92F8},
{0x6F12,0x2320},
{0x6F12,0x1B1D},
{0x6F12,0x0446},
{0x6F12,0x0E18},
{0x6F12,0x7678},
{0x6F12,0x9642},
{0x6F12,0x03D1},
{0x6F12,0x0844},
{0x6F12,0x90F8},
{0x6F12,0x3140},
{0x6F12,0x02E0},
{0x6F12,0x401C},
{0x6F12,0x3028},
{0x6F12,0xF4D3},
{0x6F12,0x5A21},
{0x6F12,0x1970},
{0x6F12,0x5C70},
{0x6F12,0x2868},
{0x6F12,0x9B1C},
{0x6F12,0x90F8},
{0x6F12,0xB820},
{0x6F12,0x1B48},
{0x6F12,0xEA38},
{0x6F12,0x8AB1},
{0x6F12,0xD0F8},
{0x6F12,0x8400},
{0x6F12,0x1970},
{0x6F12,0x8008},
{0x6F12,0x020E},
{0x6F12,0x5A70},
{0x6F12,0x9970},
{0x6F12,0x020C},
{0x6F12,0xDA70},
{0x6F12,0x1971},
{0x6F12,0x020A},
{0x6F12,0x5A71},
{0x6F12,0x9971},
{0x6F12,0xD871},
{0x6F12,0x0720},
{0x6F12,0x1872},
{0x6F12,0xBDE8},
{0x6F12,0xF081},
{0x6F12,0xD0F8},
{0x6F12,0x8000},
{0x6F12,0xECE7},
{0x6F12,0x2DE9},
{0x6F12,0xFF47},
{0x6F12,0x104D},
{0x6F12,0x0646},
{0x6F12,0x3C35},
{0x6F12,0x4FF0},
{0x6F12,0x0008},
{0x6F12,0x95F8},
{0x6F12,0x2400},
{0x6F12,0xE8B3},
{0x6F12,0x0022},
{0x6F12,0xCDF8},
{0x6F12,0x0080},
{0x6F12,0x03AB},
{0x6F12,0x02A9},
{0x6F12,0x1046},
{0x6F12,0xCDF8},
{0x6F12,0x0480},
{0x6F12,0x00F0},
{0x6F12,0x7CFD},
{0x6F12,0x0298},
{0x6F12,0xA885},
{0x6F12,0x0398},
{0x6F12,0xE885},
{0x6F12,0x76BB},
{0x6F12,0x00F0},
{0x6F12,0x7AFD},
{0x6F12,0x0146},
{0x6F12,0x0148},
{0x6F12,0xEA38},
{0x6F12,0x0DE0},
{0x6F12,0x2000},
{0x6F12,0x22FA},
{0x6F12,0x4000},
{0x6F12,0x720A},
{0x6F12,0x2000},
{0x6F12,0x46B0},
{0x6F12,0x2000},
{0x6F12,0x1F90},
{0x6F12,0x2000},
{0x6F12,0x2050},
{0x6F12,0x2000},
{0x6F12,0x2990},
{0x6F12,0x2000},
{0x6F12,0x0AF0},
{0x6F12,0x90F8},
{0x6F12,0x2305},
{0x6F12,0xC007},
{0x6F12,0x00D0},
{0x6F12,0x0220},
{0x6F12,0xFF4F},
{0x6F12,0x0C18},
{0x6F12,0x3C80},
{0x6F12,0x00F0},
{0x6F12,0x63FD},
{0x6F12,0xFD49},
{0x6F12,0x2044},
{0x6F12,0x91F8},
{0x6F12,0x5410},
{0x6F12,0x401A},
{0x6F12,0x7880},
{0x6F12,0xFB48},
{0x6F12,0x90F8},
{0x6F12,0x2305},
{0x6F12,0xC007},
{0x6F12,0x05D0},
{0x6F12,0xA88D},
{0x6F12,0x801C},
{0x6F12,0xA885},
{0x6F12,0xE88D},
{0x6F12,0x801C},
{0x6F12,0xE885},
{0x6F12,0xF748},
{0x6F12,0x0022},
{0x6F12,0x4169},
{0x6F12,0x0C0C},
{0x6F12,0x8FB2},
{0x6F12,0x3946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0x08FD},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0x4BFD},
{0x6F12,0x8146},
{0x6F12,0x0122},
{0x6F12,0x3946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xFFFC},
{0x6F12,0x0EB1},
{0x6F12,0x85F8},
{0x6F12,0x2A80},
{0x6F12,0x04B0},
{0x6F12,0x4846},
{0x6F12,0xBDE8},
{0x6F12,0xF087},
{0x6F12,0x2DE9},
{0x6F12,0xF84F},
{0x6F12,0x8246},
{0x6F12,0xE948},
{0x6F12,0x8946},
{0x6F12,0x1446},
{0x6F12,0x8169},
{0x6F12,0x1D46},
{0x6F12,0x0E0C},
{0x6F12,0x8FB2},
{0x6F12,0xDDF8},
{0x6F12,0x2880},
{0x6F12,0x0022},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0xE7FC},
{0x6F12,0x2B46},
{0x6F12,0x2246},
{0x6F12,0x4946},
{0x6F12,0x5046},
{0x6F12,0xCDF8},
{0x6F12,0x0080},
{0x6F12,0x00F0},
{0x6F12,0x2AFD},
{0x6F12,0x0122},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0xDAFC},
{0x6F12,0x2078},
{0x6F12,0xFF28},
{0x6F12,0x08D0},
{0x6F12,0xDA49},
{0x6F12,0x3C31},
{0x6F12,0x91F8},
{0x6F12,0x2410},
{0x6F12,0x0029},
{0x6F12,0x02D0},
{0x6F12,0x4000},
{0x6F12,0x2070},
{0x6F12,0x2870},
{0x6F12,0xBDE8},
{0x6F12,0xF88F},
{0x6F12,0xD54A},
{0x6F12,0xB2F8},
{0x6F12,0x3811},
{0x6F12,0x0140},
{0x6F12,0x03D0},
{0x6F12,0xA2F8},
{0x6F12,0x3811},
{0x6F12,0x0120},
{0x6F12,0x7047},
{0x6F12,0x0020},
{0x6F12,0x7047},
{0x6F12,0x70B5},
{0x6F12,0xCE48},
{0x6F12,0x0022},
{0x6F12,0xC169},
{0x6F12,0x0C0C},
{0x6F12,0x8DB2},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xB7FC},
{0x6F12,0x00F0},
{0x6F12,0x05FD},
{0x6F12,0x0122},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0xB0FC},
{0x6F12,0xC548},
{0x6F12,0x90F8},
{0x6F12,0xE900},
{0x6F12,0xFFF7},
{0x6F12,0xDFFF},
{0x6F12,0xC349},
{0x6F12,0x81F8},
{0x6F12,0x6404},
{0x6F12,0x70BD},
{0x6F12,0xC448},
{0x6F12,0x10B5},
{0x6F12,0x0078},
{0x6F12,0x0128},
{0x6F12,0x04D1},
{0x6F12,0x00F0},
{0x6F12,0xF5FC},
{0x6F12,0xBD49},
{0x6F12,0xA1F8},
{0x6F12,0x6204},
{0x6F12,0x10BD},
{0x6F12,0xBB48},
{0x6F12,0x90F8},
{0x6F12,0xE910},
{0x6F12,0x0220},
{0x6F12,0x00F0},
{0x6F12,0xF0BC},
{0x6F12,0xBC4A},
{0x6F12,0x30B4},
{0x6F12,0x1188},
{0x6F12,0x0723},
{0x6F12,0x23EA},
{0x6F12,0x0004},
{0x6F12,0x2140},
{0x6F12,0x1180},
{0x6F12,0xB449},
{0x6F12,0x91F8},
{0x6F12,0xE520},
{0x6F12,0x0121},
{0x6F12,0x9140},
{0x6F12,0xC1F3},
{0x6F12,0x4701},
{0x6F12,0x8843},
{0x6F12,0x8343},
{0x6F12,0x0822},
{0x6F12,0x30BC},
{0x6F12,0xB449},
{0x6F12,0x0220},
{0x6F12,0x00F0},
{0x6F12,0xDEBC},
{0x6F12,0x70B5},
{0x6F12,0xAD48},
{0x6F12,0x0022},
{0x6F12,0xC16A},
{0x6F12,0x0C0C},
{0x6F12,0x8DB2},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0x75FC},
{0x6F12,0x00F0},
{0x6F12,0xD7FC},
{0x6F12,0x0122},
{0x6F12,0x2946},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0x6EFC},
{0x6F12,0xA44A},
{0x6F12,0x92F8},
{0x6F12,0xF400},
{0x6F12,0x0028},
{0x6F12,0x1BD1},
{0x6F12,0x92F8},
{0x6F12,0xEE00},
{0x6F12,0x92F8},
{0x6F12,0xEF11},
{0x6F12,0x8842},
{0x6F12,0x16D9},
{0x6F12,0x401A},
{0x6F12,0xA449},
{0x6F12,0x82F8},
{0x6F12,0xF001},
{0x6F12,0xB2F8},
{0x6F12,0x3002},
{0x6F12,0xB1F8},
{0x6F12,0x8030},
{0x6F12,0x9842},
{0x6F12,0x01D2},
{0x6F12,0x0120},
{0x6F12,0x00E0},
{0x6F12,0x0020},
{0x6F12,0x82F8},
{0x6F12,0xF201},
{0x6F12,0xB1F8},
{0x6F12,0x7E10},
{0x6F12,0x8842},
{0x6F12,0x00D8},
{0x6F12,0x0846},
{0x6F12,0x82F8},
{0x6F12,0xF201},
{0x6F12,0x70BD},
{0x6F12,0x0020},
{0x6F12,0x82F8},
{0x6F12,0xF001},
{0x6F12,0xF8E7},
{0x6F12,0x2DE9},
{0x6F12,0xF041},
{0x6F12,0x0446},
{0x6F12,0x0079},
{0x6F12,0x8846},
{0x6F12,0x0128},
{0x6F12,0x2BD0},
{0x6F12,0x8E48},
{0x6F12,0x0025},
{0x6F12,0x90F8},
{0x6F12,0x2204},
{0x6F12,0x0128},
{0x6F12,0x02D1},
{0x6F12,0x8B48},
{0x6F12,0x80F8},
{0x6F12,0xE053},
{0x6F12,0x8A48},
{0x6F12,0x0022},
{0x6F12,0x006B},
{0x6F12,0x87B2},
{0x6F12,0x060C},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0x2FFC},
{0x6F12,0x4146},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0x94FC},
{0x6F12,0x0122},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0x26FC},
{0x6F12,0x00F0},
{0x6F12,0x92FC},
{0x6F12,0x10F0},
{0x6F12,0xFF02},
{0x6F12,0x0BD0},
{0x6F12,0x2068},
{0x6F12,0x08F1},
{0x6F12,0x8041},
{0x6F12,0x8379},
{0x6F12,0x3BB1},
{0x6F12,0x4089},
{0x6F12,0x1044},
{0x6F12,0x4881},
{0x6F12,0x2068},
{0x6F12,0xC089},
{0x6F12,0x1044},
{0x6F12,0xC881},
{0x6F12,0xB5E6},
{0x6F12,0x0120},
{0x6F12,0xC880},
{0x6F12,0x4A81},
{0x6F12,0x7D48},
{0x6F12,0x521E},
{0x6F12,0xB0F8},
{0x6F12,0xC031},
{0x6F12,0x1A44},
{0x6F12,0xCA81},
{0x6F12,0x0D81},
{0x6F12,0xB0F8},
{0x6F12,0xC201},
{0x6F12,0x401E},
{0x6F12,0x8881},
{0x6F12,0xA6E6},
{0x6F12,0x7349},
{0x6F12,0x7748},
{0x6F12,0x0979},
{0x6F12,0x0129},
{0x6F12,0x07D9},
{0x6F12,0x6E49},
{0x6F12,0x90F8},
{0x6F12,0x4300},
{0x6F12,0x3C31},
{0x6F12,0x91F8},
{0x6F12,0x2110},
{0x6F12,0x8842},
{0x6F12,0x01D1},
{0x6F12,0x0120},
{0x6F12,0x7047},
{0x6F12,0x0020},
{0x6F12,0x7047},
{0x6F12,0x10B5},
{0x6F12,0x684C},
{0x6F12,0x3C34},
{0x6F12,0x647D},
{0x6F12,0x04B9},
{0x6F12,0x0021},
{0x6F12,0x0024},
{0x6F12,0xE0FB},
{0x6F12,0x0214},
{0x6F12,0x6C48},
{0x6F12,0x0022},
{0x6F12,0xA1FB},
{0x6F12,0x0010},
{0x6F12,0x00F0},
{0x6F12,0x58FC},
{0x6F12,0x0846},
{0x6F12,0x10BD},
{0x6F12,0x70B5},
{0x6F12,0x0C46},
{0x6F12,0xA0FB},
{0x6F12,0x0210},
{0x6F12,0x1D46},
{0x6F12,0x0022},
{0x6F12,0x654B},
{0x6F12,0x049E},
{0x6F12,0x00F0},
{0x6F12,0x4CFC},
{0x6F12,0xB1FB},
{0x6F12,0xF4F0},
{0x6F12,0x5A4A},
{0x6F12,0x2860},
{0x6F12,0x3C32},
{0x6F12,0x527D},
{0x6F12,0x12B1},
{0x6F12,0x00FB},
{0x6F12,0x1410},
{0x6F12,0x00E0},
{0x6F12,0x0020},
{0x6F12,0x3060},
{0x6F12,0x70BD},
{0x6F12,0x2DE9},
{0x6F12,0xFF5F},
{0x6F12,0x5548},
{0x6F12,0x5A4C},
{0x6F12,0x801C},
{0x6F12,0xA4F5},
{0x6F12,0x2078},
{0x6F12,0x0390},
{0x6F12,0xB8F8},
{0x6F12,0x0600},
{0x6F12,0x0090},
{0x6F12,0xA4F8},
{0x6F12,0x7200},
{0x6F12,0x0098},
{0x6F12,0x4FEA},
{0x6F12,0xD009},
{0x6F12,0xB4F8},
{0x6F12,0x4C00},
{0x6F12,0xB0F5},
{0x6F12,0x805F},
{0x6F12,0x7ED0},
{0x6F12,0xDFF8},
{0x6F12,0x28B1},
{0x6F12,0x484F},
{0x6F12,0x0BF1},
{0x6F12,0x3C0B},
{0x6F12,0x9BF8},
{0x6F12,0x1400},
{0x6F12,0x60B9},
{0x6F12,0xB7F8},
{0x6F12,0x2403},
{0x6F12,0x4845},
{0x6F12,0x08D0},
{0x6F12,0x0103},
{0x6F12,0x0022},
{0x6F12,0x4B46},
{0x6F12,0x1046},
{0x6F12,0x00F0},
{0x6F12,0x18FC},
{0x6F12,0x0646},
{0x6F12,0x0D46},
{0x6F12,0x02E0},
{0x6F12,0x4FF4},
{0x6F12,0x8055},
{0x6F12,0x0026},
{0x6F12,0x3D48},
{0x6F12,0xB8F8},
{0x6F12,0x0410},
{0x6F12,0xB0F8},
{0x6F12,0x3022},
{0x6F12,0x436D},
{0x6F12,0xD8F8},
{0x6F12,0x0000},
{0x6F12,0xFFF7},
{0x6F12,0xA1FF},
{0x6F12,0x0746},
{0x6F12,0xA060},
{0x6F12,0xB4F8},
{0x6F12,0x4C00},
{0x6F12,0x4FF0},
{0x6F12,0x000A},
{0x6F12,0x0103},
{0x6F12,0x3246},
{0x6F12,0x2B46},
{0x6F12,0x5046},
{0x6F12,0x00F0},
{0x6F12,0xFCFB},
{0x6F12,0x0246},
{0x6F12,0x3846},
{0x6F12,0xA0FB},
{0x6F12,0x017C},
{0x6F12,0x0AFB},
{0x6F12,0x01C1},
{0x6F12,0x00FB},
{0x6F12,0x0210},
{0x6F12,0x2F49},
{0x6F12,0x3F0B},
{0x6F12,0x3C31},
{0x6F12,0x47EA},
{0x6F12,0x0057},
{0x6F12,0x888B},
{0x6F12,0x4FF4},
{0x6F12,0x7A72},
{0x6F12,0x00FB},
{0x6F12,0x02FA},
{0x6F12,0xC88B},
{0x6F12,0x5745},
{0x6F12,0x00FB},
{0x6F12,0x02FB},
{0x6F12,0x11D9},
{0x6F12,0x0846},
{0x6F12,0x007D},
{0x6F12,0x60B9},
{0x6F12,0xA5FB},
{0x6F12,0x0712},
{0x6F12,0x06FB},
{0x6F12,0x0722},
{0x6F12,0x0020},
{0x6F12,0x05FB},
{0x6F12,0x0020},
{0x6F12,0x5346},
{0x6F12,0x0022},
{0x6F12,0x00F0},
{0x6F12,0xD7FB},
{0x6F12,0x0646},
{0x6F12,0x0D46},
{0x6F12,0x5746},
{0x6F12,0x13E0},
{0x6F12,0x5F45},
{0x6F12,0x11D2},
{0x6F12,0x1D48},
{0x6F12,0x3C30},
{0x6F12,0x007D},
{0x6F12,0x60B9},
{0x6F12,0xA5FB},
{0x6F12,0x0712},
{0x6F12,0x06FB},
{0x6F12,0x0722},
{0x6F12,0x0020},
{0x6F12,0x05FB},
{0x6F12,0x0020},
{0x6F12,0x5B46},
{0x6F12,0x0022},
{0x6F12,0x00F0},
{0x6F12,0xC2FB},
{0x6F12,0x0646},
{0x6F12,0x0D46},
{0x6F12,0x5F46},
{0x6F12,0x681C},
{0x6F12,0x76F1},
{0x6F12,0x0000},
{0x6F12,0x02D3},
{0x6F12,0x4FF0},
{0x6F12,0xFF35},
{0x6F12,0x0026},
{0x6F12,0x0098},
{0x6F12,0x0021},
{0x6F12,0xA0FB},
{0x6F12,0x0523},
{0x6F12,0x01FB},
{0x6F12,0x0531},
{0x6F12,0x00FB},
{0x6F12,0x0610},
{0x6F12,0x0105},
{0x6F12,0x41EA},
{0x6F12,0x1230},
{0x6F12,0x80B2},
{0x6F12,0x00E0},
{0x6F12,0x64E0},
{0x6F12,0x0A4E},
{0x6F12,0x3C36},
{0x6F12,0xF18A},
{0x6F12,0x8142},
{0x6F12,0x00D2},
{0x6F12,0x0846},
{0x6F12,0x318B},
{0x6F12,0x8142},
{0x6F12,0x00D9},
{0x6F12,0x0846},
{0x6F12,0xA4F8},
{0x6F12,0x7400},
{0x6F12,0xC508},
{0x6F12,0x19D1},
{0x6F12,0x17E0},
{0x6F12,0x4000},
{0x6F12,0xF1A8},
{0x6F12,0x2000},
{0x6F12,0x3460},
{0x6F12,0x2000},
{0x6F12,0x2210},
{0x6F12,0x2000},
{0x6F12,0x46B0},
{0x6F12,0x4000},
{0x6F12,0x7000},
{0x6F12,0x2000},
{0x6F12,0x2050},
{0x6F12,0x4000},
{0x6F12,0x7138},
{0x6F12,0x0000},
{0x6F12,0x356B},
{0x6F12,0x2000},
{0x6F12,0x10F0},
{0x6F12,0x2000},
{0x6F12,0x2BC0},
{0x6F12,0x2000},
{0x6F12,0x25F0},
{0x6F12,0x000F},
{0x6F12,0x4240},
{0x6F12,0x0125},
{0x6F12,0xB5F5},
{0x6F12,0x007F},
{0x6F12,0x01D3},
{0x6F12,0x40F2},
{0x6F12,0xFF15},
{0x6F12,0x02A8},
{0x6F12,0x0090},
{0x6F12,0xFE48},
{0x6F12,0x01AB},
{0x6F12,0xB0F8},
{0x6F12,0x3012},
{0x6F12,0x426D},
{0x6F12,0x3846},
{0x6F12,0xFFF7},
{0x6F12,0x1DFF},
{0x6F12,0xE760},
{0x6F12,0x0198},
{0x6F12,0x2061},
{0x6F12,0x728B},
{0x6F12,0xD8F8},
{0x6F12,0x0010},
{0x6F12,0x9142},
{0x6F12,0x01D8},
{0x6F12,0x0023},
{0x6F12,0x01E0},
{0x6F12,0x8B1A},
{0x6F12,0x9BB2},
{0x6F12,0x96F8},
{0x6F12,0x2070},
{0x6F12,0xFF37},
{0x6F12,0x8142},
{0x6F12,0x09D9},
{0x6F12,0x9842},
{0x6F12,0x07D3},
{0x6F12,0xD4F8},
{0x6F12,0x48C0},
{0x6F12,0xBC45},
{0x6F12,0x03D1},
{0x6F12,0x039F},
{0x6F12,0xBF79},
{0x6F12,0xFF2F},
{0x6F12,0x06D1},
{0x6F12,0x8342},
{0x6F12,0x04D8},
{0x6F12,0x1144},
{0x6F12,0x8142},
{0x6F12,0x01D3},
{0x6F12,0xA945},
{0x6F12,0x0BD0},
{0x6F12,0xA4F8},
{0x6F12,0x5850},
{0x6F12,0x0299},
{0x6F12,0xC4E9},
{0x6F12,0x1401},
{0x6F12,0x96F8},
{0x6F12,0x2200},
{0x6F12,0x68B9},
{0x6F12,0x0120},
{0x6F12,0x6070},
{0x6F12,0xBDE8},
{0x6F12,0xFF9F},
{0x6F12,0x6078},
{0x6F12,0x38B9},
{0x6F12,0xA4F8},
{0x6F12,0x5890},
{0x6F12,0xB8F8},
{0x6F12,0x0400},
{0x6F12,0x6065},
{0x6F12,0xD8F8},
{0x6F12,0x0000},
{0x6F12,0x2065},
{0x6F12,0x0020},
{0x6F12,0xF0E7},
{0x6F12,0xF0B5},
{0x6F12,0xDE48},
{0x6F12,0xA0F5},
{0x6F12,0x2075},
{0x6F12,0xB0F8},
{0x6F12,0x4C20},
{0x6F12,0xEC88},
{0x6F12,0xA0F8},
{0x6F12,0x7240},
{0x6F12,0x04FB},
{0x6F12,0x02F1},
{0x6F12,0x4FF4},
{0x6F12,0x8032},
{0x6F12,0xB2EB},
{0x6F12,0x113F},
{0x6F12,0x01D8},
{0x6F12,0x511E},
{0x6F12,0x00E0},
{0x6F12,0x090B},
{0x6F12,0xD64F},
{0x6F12,0x8EB2},
{0x6F12,0xF308},
{0x6F12,0x398B},
{0x6F12,0xFA8A},
{0x6F12,0xC908},
{0x6F12,0xD208},
{0x6F12,0x9942},
{0x6F12,0x01D9},
{0x6F12,0x8C46},
{0x6F12,0x00E0},
{0x6F12,0x9C46},
{0x6F12,0xBCF1},
{0x6F12,0x000F},
{0x6F12,0x06D0},
{0x6F12,0x9942},
{0x6F12,0x00D8},
{0x6F12,0x1946},
{0x6F12,0x8A42},
{0x6F12,0x03D2},
{0x6F12,0x1346},
{0x6F12,0x02E0},
{0x6F12,0x0121},
{0x6F12,0xF9E7},
{0x6F12,0x0B46},
{0x6F12,0xB3F5},
{0x6F12,0x007F},
{0x6F12,0x02D3},
{0x6F12,0x40F2},
{0x6F12,0xFF11},
{0x6F12,0x02E0},
{0x6F12,0x8A42},
{0x6F12,0x00D2},
{0x6F12,0x1146},
{0x6F12,0x4278},
{0x6F12,0x012A},
{0x6F12,0x04D1},
{0x6F12,0xB442},
{0x6F12,0x02D1},
{0x6F12,0x0021},
{0x6F12,0x4170},
{0x6F12,0xF0BD},
{0x6F12,0xA0F8},
{0x6F12,0x5810},
{0x6F12,0xA988},
{0x6F12,0x4165},
{0x6F12,0x2968},
{0x6F12,0x0165},
{0x6F12,0x97F8},
{0x6F12,0x2210},
{0x6F12,0x21B1},
{0x6F12,0x0021},
{0x6F12,0x4170},
{0x6F12,0xA0F8},
{0x6F12,0x7460},
{0x6F12,0xF0BD},
{0x6F12,0x0121},
{0x6F12,0xF9E7},
{0x6F12,0x70B5},
{0x6F12,0xB84E},
{0x6F12,0xB94C},
{0x6F12,0x96F8},
{0x6F12,0x2200},
{0x6F12,0xE588},
{0x6F12,0x0128},
{0x6F12,0x0AD1},
{0x6F12,0xB349},
{0x6F12,0x91F8},
{0x6F12,0xE003},
{0x6F12,0x0128},
{0x6F12,0x01D1},
{0x6F12,0xE28C},
{0x6F12,0xE280},
{0x6F12,0xC0F1},
{0x6F12,0x0100},
{0x6F12,0x81F8},
{0x6F12,0xE003},
{0x6F12,0x00F0},
{0x6F12,0xDCFA},
{0x6F12,0xE580},
{0x6F12,0xA41C},
{0x6F12,0xFF28},
{0x6F12,0x05D1},
{0x6F12,0xA179},
{0x6F12,0xFF29},
{0x6F12,0x02D0},
{0x6F12,0x96F8},
{0x6F12,0x2000},
{0x6F12,0xFF30},
{0x6F12,0x70BD},
{0x6F12,0x10B5},
{0x6F12,0xA84C},
{0x6F12,0x207D},
{0x6F12,0x0228},
{0x6F12,0x04D1},
{0x6F12,0xFFF7},
{0x6F12,0x8CFF},
{0x6F12,0x207D},
{0x6F12,0x0228},
{0x6F12,0x01D0},
{0x6F12,0xFFF7},
{0x6F12,0x81FE},
{0x6F12,0xA548},
{0x6F12,0x006B},
{0x6F12,0x8047},
{0x6F12,0x9F49},
{0x6F12,0xC1F8},
{0x6F12,0xE403},
{0x6F12,0x10BD},
{0x6F12,0x2DE9},
{0x6F12,0xF041},
{0x6F12,0x9D4D},
{0x6F12,0xDFF8},
{0x6F12,0x7C82},
{0x6F12,0x2878},
{0x6F12,0x98F8},
{0x6F12,0x0860},
{0x6F12,0x98F8},
{0x6F12,0x0970},
{0x6F12,0x08F1},
{0x6F12,0x0204},
{0x6F12,0x0128},
{0x6F12,0x05D1},
{0x6F12,0x94F8},
{0x6F12,0x2600},
{0x6F12,0xA071},
{0x6F12,0x94F8},
{0x6F12,0x2700},
{0x6F12,0xE071},
{0x6F12,0x00F0},
{0x6F12,0xADFA},
{0x6F12,0xA671},
{0x6F12,0xE771},
{0x6F12,0x98F8},
{0x6F12,0x0300},
{0x6F12,0x4006},
{0x6F12,0x1DD4},
{0x6F12,0xB5F8},
{0x6F12,0x4C00},
{0x6F12,0xB0F5},
{0x6F12,0x805F},
{0x6F12,0x18D0},
{0x6F12,0x4FF6},
{0x6F12,0xFF76},
{0x6F12,0xB042},
{0x6F12,0x14D0},
{0x6F12,0x00F0},
{0x6F12,0xA1FA},
{0x6F12,0xA279},
{0x6F12,0xC0F3},
{0x6F12,0x1310},
{0x6F12,0xA96C},
{0x6F12,0x8242},
{0x6F12,0x03D9},
{0x6F12,0x8142},
{0x6F12,0x01D9},
{0x6F12,0x121A},
{0x6F12,0x091A},
{0x6F12,0x1003},
{0x6F12,0xB0FB},
{0x6F12,0xF1F0},
{0x6F12,0xB0F5},
{0x6F12,0x803F},
{0x6F12,0x00D2},
{0x6F12,0x0646},
{0x6F12,0xA5F8},
{0x6F12,0x4C60},
{0x6F12,0xACE4},
{0x6F12,0x2DE9},
{0x6F12,0xF041},
{0x6F12,0x1500},
{0x6F12,0x8846},
{0x6F12,0x0446},
{0x6F12,0x0ED0},
{0x6F12,0x0C22},
{0x6F12,0x04F1},
{0x6F12,0x5001},
{0x6F12,0x04F1},
{0x6F12,0x5C00},
{0x6F12,0x00F0},
{0x6F12,0x85FA},
{0x6F12,0x7949},
{0x6F12,0x0028},
{0x6F12,0xB1F8},
{0x6F12,0xF803},
{0x6F12,0x18D0},
{0x6F12,0x401C},
{0x6F12,0xA1F8},
{0x6F12,0xF803},
{0x6F12,0x7748},
{0x6F12,0x0022},
{0x6F12,0x3C38},
{0x6F12,0x406B},
{0x6F12,0x87B2},
{0x6F12,0x060C},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0x00F0},
{0x6F12,0xECF9},
{0x6F12,0x2A46},
{0x6F12,0x4146},
{0x6F12,0x2046},
{0x6F12,0x00F0},
{0x6F12,0x73FA},
{0x6F12,0x3946},
{0x6F12,0x3046},
{0x6F12,0xBDE8},
{0x6F12,0xF041},
{0x6F12,0x0122},
{0x6F12,0x00F0},
{0x6F12,0xE0B9},
{0x6F12,0x08B1},
{0x6F12,0xA1F8},
{0x6F12,0xF403},
{0x6F12,0x0020},
{0x6F12,0xA1F8},
{0x6F12,0xF803},
{0x6F12,0xB1F8},
{0x6F12,0xF633},
{0x6F12,0xB1F8},
{0x6F12,0xF403},
{0x6F12,0x8342},
{0x6F12,0x00D8},
{0x6F12,0x0346},
{0x6F12,0xA1F8},
{0x6F12,0xF633},
{0x6F12,0xD9E7},
{0x6F12,0x2DE9},
{0x6F12,0xF041},
{0x6F12,0x48F6},
{0x6F12,0x1A30},
{0x6F12,0x00F0},
{0x6F12,0x5BFA},
{0x6F12,0x5F4E},
{0x6F12,0x0D46},
{0x6F12,0x0446},
{0x6F12,0xB6F8},
{0x6F12,0x3032},
{0x6F12,0x4FF0},
{0x6F12,0x0008},
{0x6F12,0x5A08},
{0x6F12,0x5119},
{0x6F12,0x40EB},
{0x6F12,0xE270},
{0x6F12,0x1F46},
{0x6F12,0x4246},
{0x6F12,0x00F0},
{0x6F12,0x2EFA},
{0x6F12,0x3046},
{0x6F12,0x0A00},
{0x6F12,0x00F2},
{0x6F12,0xD443},
{0x6F12,0xC0F8},
{0x6F12,0xD414},
{0x6F12,0x13D0},
{0x6F12,0x96F8},
{0x6F12,0x5013},
{0x6F12,0x96F8},
{0x6F12,0x5103},
{0x6F12,0x0129},
{0x6F12,0x0ED0},
{0x6F12,0x0229},
{0x6F12,0x0BD1},
{0x6F12,0x07FB},
{0x6F12,0x00F3},
{0x6F12,0x5908},
{0x6F12,0x4919},
{0x6F12,0x48EB},
{0x6F12,0x0400},
{0x6F12,0x0022},
{0x6F12,0x00F0},
{0x6F12,0x16FA},
{0x6F12,0x3046},
{0x6F12,0xC0F8},
{0x6F12,0xD414},
{0x6F12,0x40E4},
{0x6F12,0x4243},
{0x6F12,0x1A60},
{0x6F12,0x3DE4},
{0x6F12,0x2DE9},
{0x6F12,0xF047},
{0x6F12,0x494C},
{0x6F12,0x8246},
{0x6F12,0x9046},
{0x6F12,0x94F8},
{0x6F12,0x2600},
{0x6F12,0x8946},
{0x6F12,0x0028},
{0x6F12,0x7DD0},
{0x6F12,0x484E},
{0x6F12,0x0027},
{0x6F12,0x96F8},
{0x6F12,0x6E00},
{0x6F12,0x0328},
{0x6F12,0x11D1},
{0x6F12,0xFFF7},
{0x6F12,0xBAFF},
{0x6F12,0x3F48},
{0x6F12,0xD0F8},
{0x6F12,0xD404},
{0x6F12,0x58B1},
{0x6F12,0x4349},
{0x6F12,0x80B2},
{0x6F12,0x0968},
{0x6F12,0xB1F8},
{0x6F12,0x9821},
{0x6F12,0x9042},
{0x6F12,0x04D0},
{0x6F12,0xA1F8},
{0x6F12,0x9801},
{0x6F12,0x3948},
{0x6F12,0xC0F8},
{0x6F12,0xB874},
{0x6F12,0x3748},
{0x6F12,0x90F8},
{0x6F12,0x9004},
{0x6F12,0x0128},
{0x6F12,0x60D1},
{0x6F12,0x354D},
{0x6F12,0x95F8},
{0x6F12,0x5003},
{0x6F12,0x0228},
{0x6F12,0x35D0},
{0x6F12,0x0120},
{0x6F12,0x3249},
{0x6F12,0xD1F8},
{0x6F12,0xC014},
{0x6F12,0x0A18},
{0x6F12,0x3048},
{0x6F12,0xD0F8},
{0x6F12,0x2005},
{0x6F12,0x8242},
{0x6F12,0x69D8},
{0x6F12,0x2D49},
{0x6F12,0xC1F8},
{0x6F12,0xC004},
{0x6F12,0x48F6},
{0x6F12,0x0C30},
{0x6F12,0x00F0},
{0x6F12,0xF5F9},
{0x6F12,0x2A49},
{0x6F12,0x01F2},
{0x6F12,0x0C52},
{0x6F12,0xB1F8},
{0x6F12,0x0C15},
{0x6F12,0x491C},
{0x6F12,0x1180},
{0x6F12,0x2649},
{0x6F12,0x40F2},
{0x6F12,0xC442},
{0x6F12,0xC1F8},
{0x6F12,0xC404},
{0x6F12,0x5058},
{0x6F12,0xB5F8},
{0x6F12,0x3012},
{0x6F12,0xB0FB},
{0x6F12,0xF1F1},
{0x6F12,0x2148},
{0x6F12,0x2163},
{0x6F12,0x96F9},
{0x6F12,0x6230},
{0x6F12,0xD0F8},
{0x6F12,0xAC24},
{0x6F12,0xD618},
{0x6F12,0xA664},
{0x6F12,0x94F9},
{0x6F12,0x2700},
{0x6F12,0x1718},
{0x6F12,0x2765},
{0x6F12,0x9A42},
{0x6F12,0x08DA},
{0x6F12,0xD5F8},
{0x6F12,0xD8C3},
{0x6F12,0x9444},
{0x6F12,0xACEB},
{0x6F12,0x030C},
{0x6F12,0x04E0},
{0x6F12,0x95F8},
{0x6F12,0x5103},
{0x6F12,0xC7E7},
{0x6F12,0xA2EB},
{0x6F12,0x030C},
{0x6F12,0xC4F8},
{0x6F12,0x44C0},
{0x6F12,0x0028},
{0x6F12,0x07DD},
{0x6F12,0x8242},
{0x6F12,0x05DA},
{0x6F12,0xD5F8},
{0x6F12,0xD8C3},
{0x6F12,0x9444},
{0x6F12,0xACEB},
{0x6F12,0x000C},
{0x6F12,0x01E0},
{0x6F12,0xA2EB},
{0x6F12,0x000C},
{0x6F12,0xC4F8},
{0x6F12,0x4CC0},
{0x6F12,0xD5F8},
{0x6F12,0xD853},
{0x6F12,0x02EB},
{0x6F12,0x5502},
{0x6F12,0x6263},
{0x6F12,0x9142},
{0x6F12,0x32D9},
{0x6F12,0x0028},
{0x6F12,0x23DD},
{0x6F12,0x6246},
{0x6F12,0x9142},
{0x6F12,0x01D2},
{0x6F12,0x9742},
{0x6F12,0x35D3},
{0x6F12,0xB942},
{0x6F12,0x1CD9},
{0x6F12,0x00E0},
{0x6F12,0x58E0},
{0x6F12,0x6745},
{0x6F12,0x18D9},
{0x6F12,0x0349},
{0x6F12,0xC1F8},
{0x6F12,0xA804},
{0x6F12,0xB4F8},
{0x6F12,0x4000},
{0x6F12,0x401C},
{0x6F12,0x0EE0},
{0x6F12,0x2000},
{0x6F12,0x2210},
{0x6F12,0x2000},
{0x6F12,0x25F0},
{0x6F12,0x2000},
{0x6F12,0x46EC},
{0x6F12,0x2000},
{0x6F12,0x2050},
{0x6F12,0x2000},
{0x6F12,0x20A0},
{0x6F12,0x2000},
{0x6F12,0x10F0},
{0x6F12,0x2000},
{0x6F12,0x0AF0},
{0x6F12,0x3AE0},
{0x6F12,0xA4F8},
{0x6F12,0x4000},
{0x6F12,0x32E0},
{0x6F12,0x606C},
{0x6F12,0x8142},
{0x6F12,0x01D2},
{0x6F12,0x8642},
{0x6F12,0x27D3},
{0x6F12,0xB142},
{0x6F12,0x2BD9},
{0x6F12,0x8642},
{0x6F12,0x29D9},
{0x6F12,0x6448},
{0x6F12,0xC0F8},
{0x6F12,0xA834},
{0x6F12,0x16E0},
{0x6F12,0x0028},
{0x6F12,0x0EDD},
{0x6F12,0xB942},
{0x6F12,0x01D9},
{0x6F12,0x4042},
{0x6F12,0xD3E7},
{0x6F12,0x6145},
{0x6F12,0x08D2},
{0x6F12,0x6745},
{0x6F12,0x06D9},
{0x6F12,0x5D49},
{0x6F12,0xC1F8},
{0x6F12,0xA804},
{0x6F12,0xE08F},
{0x6F12,0x401C},
{0x6F12,0xE087},
{0x6F12,0x14E0},
{0x6F12,0xB142},
{0x6F12,0x07D9},
{0x6F12,0x5848},
{0x6F12,0x5942},
{0x6F12,0xC0F8},
{0x6F12,0xA814},
{0x6F12,0xA08F},
{0x6F12,0x401C},
{0x6F12,0xA087},
{0x6F12,0x0AE0},
{0x6F12,0x606C},
{0x6F12,0x8142},
{0x6F12,0x07D2},
{0x6F12,0x8642},
{0x6F12,0x05D9},
{0x6F12,0x5248},
{0x6F12,0xC0F8},
{0x6F12,0xA834},
{0x6F12,0x608F},
{0x6F12,0x401C},
{0x6F12,0x6087},
{0x6F12,0x4F48},
{0x6F12,0xB0F8},
{0x6F12,0xAA04},
{0x6F12,0x2087},
{0x6F12,0x05E0},
{0x6F12,0x0A30},
{0x6F12,0x8142},
{0x6F12,0x02D9},
{0x6F12,0x4B48},
{0x6F12,0xC0F8},
{0x6F12,0xC074},
{0x6F12,0x4246},
{0x6F12,0x4946},
{0x6F12,0x5046},
{0x6F12,0xBDE8},
{0x6F12,0xF047},
{0x6F12,0x00F0},
{0x6F12,0x4EB9},
{0x6F12,0x70B5},
{0x6F12,0xAFF2},
{0x6F12,0x5130},
{0x6F12,0x454D},
{0x6F12,0xA864},
{0x6F12,0xAFF2},
{0x6F12,0x9930},
{0x6F12,0x2865},
{0x6F12,0xAFF2},
{0x6F12,0x3730},
{0x6F12,0x2864},
{0x6F12,0xAFF2},
{0x6F12,0xBD60},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x2B51},
{0x6F12,0xE864},
{0x6F12,0x3F48},
{0x6F12,0x00F0},
{0x6F12,0x3FF9},
{0x6F12,0x3F4C},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x3F41},
{0x6F12,0x2060},
{0x6F12,0x3D48},
{0x6F12,0x00F0},
{0x6F12,0x37F9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x1131},
{0x6F12,0x6060},
{0x6F12,0x3B48},
{0x6F12,0x00F0},
{0x6F12,0x30F9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0xB121},
{0x6F12,0xA060},
{0x6F12,0x3848},
{0x6F12,0x00F0},
{0x6F12,0x29F9},
{0x6F12,0x0022},
{0x6F12,0xAFF2},
{0x6F12,0x8371},
{0x6F12,0xE060},
{0x6F12,0x3648},
{0x6F12,0x00F0},
{0x6F12,0x22F9},
{0x6F12,0x0022},
{0x6F12,0xAFF2},
{0x6F12,0x1531},
{0x6F12,0x2063},
{0x6F12,0x3348},
{0x6F12,0x00F0},
{0x6F12,0x1BF9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x9921},
{0x6F12,0x6063},
{0x6F12,0x3148},
{0x6F12,0x00F0},
{0x6F12,0x14F9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0xCD11},
{0x6F12,0x2061},
{0x6F12,0x2E48},
{0x6F12,0x00F0},
{0x6F12,0x0DF9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x1B11},
{0x6F12,0x6061},
{0x6F12,0x2C48},
{0x6F12,0x00F0},
{0x6F12,0x06F9},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x8501},
{0x6F12,0xA061},
{0x6F12,0x2948},
{0x6F12,0x00F0},
{0x6F12,0xFFF8},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0xC901},
{0x6F12,0x2062},
{0x6F12,0x2748},
{0x6F12,0x00F0},
{0x6F12,0xF8F8},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x8B01},
{0x6F12,0xE061},
{0x6F12,0x2448},
{0x6F12,0x00F0},
{0x6F12,0xF1F8},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x8F01},
{0x6F12,0x6062},
{0x6F12,0x2248},
{0x6F12,0x00F0},
{0x6F12,0xEAF8},
{0x6F12,0x0022},
{0x6F12,0xAFF6},
{0x6F12,0x6D01},
{0x6F12,0xA062},
{0x6F12,0x1F48},
{0x6F12,0x00F0},
{0x6F12,0xE3F8},
{0x6F12,0x0022},
{0x6F12,0xAFF2},
{0x6F12,0x1F31},
{0x6F12,0xE062},
{0x6F12,0x1D48},
{0x6F12,0x00F0},
{0x6F12,0xDCF8},
{0x6F12,0xA063},
{0x6F12,0x04F1},
{0x6F12,0x3C01},
{0x6F12,0x0020},
{0x6F12,0x8887},
{0x6F12,0x4887},
{0x6F12,0xA1F8},
{0x6F12,0x4000},
{0x6F12,0xC887},
{0x6F12,0xAFF2},
{0x6F12,0xD320},
{0x6F12,0x0549},
{0x6F12,0xA861},
{0x6F12,0x42F6},
{0x6F12,0x5300},
{0x6F12,0xC1F8},
{0x6F12,0x1C05},
{0x6F12,0x1449},
{0x6F12,0x0968},
{0x6F12,0x4883},
{0x6F12,0x70BD},
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{0x6F12,0x46B0},
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{0x6F12,0xFB6F},
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{0x6F12,0x9489},
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{0x6F12,0x287B},
{0x6F12,0x0000},
{0x6F12,0x8769},
{0x6F12,0x0001},
{0x6F12,0x1987},
{0x6F12,0x0000},
{0x6F12,0x93F3},
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{0x6F12,0x0000},
{0x6F12,0x356B},
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{0x6F12,0x3753},
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{0x6F12,0x7EF3},
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{0x6F12,0x1C07},
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{0x6F12,0x0AF0},
{0x6F12,0x46F6},
{0x6F12,0x7D2C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x41F2},
{0x6F12,0xE97C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x45F6},
{0x6F12,0xD10C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x46F2},
{0x6F12,0xA56C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x46F2},
{0x6F12,0xD16C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x46F2},
{0x6F12,0xE76C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F6},
{0x6F12,0xDD2C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x42F6},
{0x6F12,0x736C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F6},
{0x6F12,0x590C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x41F2},
{0x6F12,0xB55C},
{0x6F12,0xC0F2},
{0x6F12,0x010C},
{0x6F12,0x6047},
{0x6F12,0x42F6},
{0x6F12,0x7B0C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x41F6},
{0x6F12,0x617C},
{0x6F12,0xC0F2},
{0x6F12,0x010C},
{0x6F12,0x6047},
{0x6F12,0x40F6},
{0x6F12,0x996C},
{0x6F12,0xC0F2},
{0x6F12,0x010C},
{0x6F12,0x6047},
{0x6F12,0x40F2},
{0x6F12,0x4F7C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x48F2},
{0x6F12,0x697C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x41F6},
{0x6F12,0x871C},
{0x6F12,0xC0F2},
{0x6F12,0x010C},
{0x6F12,0x6047},
{0x6F12,0x49F2},
{0x6F12,0xD73C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F6},
{0x6F12,0x013C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x43F2},
{0x6F12,0xE72C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x43F2},
{0x6F12,0x3D7C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x47F6},
{0x6F12,0xF36C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x4FF6},
{0x6F12,0x6F3C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x40F6},
{0x6F12,0x494C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x42F2},
{0x6F12,0x3D2C},
{0x6F12,0xC0F2},
{0x6F12,0x010C},
{0x6F12,0x6047},
{0x6F12,0x49F2},
{0x6F12,0x136C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F2},
{0x6F12,0x855C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x4FF2},
{0x6F12,0x735C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x46F6},
{0x6F12,0x2F5C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F2},
{0x6F12,0x894C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x41F6},
{0x6F12,0xC53C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x46F6},
{0x6F12,0xA92C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x42F2},
{0x6F12,0xD72C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x49F2},
{0x6F12,0x211C},
{0x6F12,0xC0F2},
{0x6F12,0x000C},
{0x6F12,0x6047},
{0x6F12,0x0000},
{0x602A,0x17CC},
{0x6F12,0x0100},
{0x602A,0x17CE},
{0x6F12,0x0001},
{0x602A,0x16FA},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
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{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x001E},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x001E},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0014},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x002F},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x005E},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x008D},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x002F},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0004},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x001E},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x07C8},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0032},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x07C8},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0046},
{0x6F12,0x0000},
{0x6F12,0x0002},
{0x6F12,0x0002},
{0x6F12,0x0002},
{0x6F12,0x0002},
{0x6F12,0x0002},
{0x6F12,0x0101},
{0x6F12,0x0000},
{0x6F12,0x0201},
{0x6F12,0x0002},
{0x6F12,0x0000},
{0x6F12,0x0002},
{0x6F12,0x0000},
{0x6F12,0x0102},
{0x6F12,0x0101},
{0x6F12,0x0101},
{0x602A,0x17FA},
{0x6F12,0xF7EF},
{0x6F12,0x1EFF},
{0x602A,0x181C},
{0x6F12,0x6C8A},
{0x602A,0x17F2},
{0x6F12,0x6307},
{0x602A,0x17DE},
{0x6F12,0x0808},
{0x6F12,0x0808},
{0x6F12,0x0909},
{0x6F12,0x0909},
{0x6F12,0x1313},
{0x6F12,0x1313},
{0x6F12,0x0D0D},
{0x6F12,0x0D0D},
{0xF47A,0x0000},
{0xF480,0x0040},
{0xF490,0x000F},
{0x0204,0x0020},
{0xF48A,0x0000},
{0xF47C,0x0000},
{0xF446,0x001F},
{0xF448,0x001F},
{0xF444,0x0012},
{0xF44E,0x001C},
{0xF482,0x0000},
{0x602A,0x1390},
{0x6F12,0x0004},
{0x602A,0x1BB6},
{0x6F12,0x0226},
{0x602A,0x11A8},
{0x6F12,0x0001},
{0x602A,0x10EC},
{0x6F12,0x0100},
{0xF410,0x0002},
{0x602A,0x17F0},
{0x6F12,0x0000},
{0x602A,0x130A},
{0x6F12,0x0003},
{0x602A,0x130E},
{0x6F12,0x0008},
{0x602A,0x1312},
{0x6F12,0x0001},
{0x602A,0x1316},
{0x6F12,0x000A},
{0x602A,0x131A},
{0x6F12,0x0003},
{0x602A,0x131E},
{0x6F12,0x0006},
{0x602A,0x1322},
{0x6F12,0x0004},
{0x602A,0x1326},
{0x6F12,0x0024},
{0x602A,0x132A},
{0x6F12,0x0008},
{0x602A,0x132E},
{0x6F12,0x0004},
{0x602A,0x1332},
{0x6F12,0x0003},
{0x602A,0x1336},
{0x6F12,0x0007},
{0x602A,0x133A},
{0x6F12,0x0023},
{0x602A,0x133E},
{0x6F12,0x001A},
{0x602A,0x1342},
{0x6F12,0x0009},
{0x602A,0x1346},
{0x6F12,0x0000},
{0x602A,0x134A},
{0x6F12,0x0004},
{0x602A,0x134E},
{0x6F12,0x0000},
{0x602A,0x1352},
{0x6F12,0x0010},
{0x602A,0x1356},
{0x6F12,0x0003},
{0x602A,0x135A},
{0x6F12,0x0002},
{0x602A,0x135E},
{0x6F12,0x0003},
{0x602A,0x1362},
{0x6F12,0x0002},
{0x602A,0x1366},
{0x6F12,0x0022},
{0x602A,0x136A},
{0x6F12,0x002B},
{0x602A,0x136E},
{0x6F12,0x0002},
{0x602A,0x1372},
{0x6F12,0x0003},
{0x602A,0x1376},
{0x6F12,0x0002},
{0x602A,0x137A},
{0x6F12,0x0002},
{0x602A,0x137E},
{0x6F12,0x0002},
{0x602A,0x1382},
{0x6F12,0x0005},
{0x602A,0x1386},
{0x6F12,0x0005},
{0x602A,0x138A},
{0x6F12,0x0002},
{0x602A,0x138E},
{0x6F12,0x0004},
{0x602A,0x1392},
{0x6F12,0x0001},
{0x602A,0x1396},
{0x6F12,0x0002},
{0x602A,0x139A},
{0x6F12,0x0005},
{0x602A,0x139E},
{0x6F12,0x0002},
{0x602A,0x13A2},
{0x6F12,0x000D},
{0x602A,0x13A6},
{0x6F12,0x0015},
{0x602A,0x13AA},
{0x6F12,0x002B},
{0x602A,0x13AE},
{0x6F12,0x002D},
{0x602A,0x13B2},
{0x6F12,0x009A},
{0x602A,0x13B6},
{0x6F12,0x0018},
{0x602A,0x13BA},
{0x6F12,0x0006},
{0x602A,0x13BE},
{0x6F12,0x0005},
{0x602A,0x13C2},
{0x6F12,0x0005},
{0x602A,0x13C6},
{0x6F12,0x0000},
{0x602A,0x13CA},
{0x6F12,0x0000},
{0x602A,0x13CE},
{0x6F12,0x0019},
{0x602A,0x13D2},
{0x6F12,0x0005},
{0x602A,0x13D6},
{0x6F12,0x0000},
{0x602A,0x13DA},
{0x6F12,0x0000},
{0x602A,0x13DE},
{0x6F12,0x0023},
{0x602A,0x13E2},
{0x6F12,0x0005},
{0x602A,0x13E6},
{0x6F12,0x0000},
{0x602A,0x13EA},
{0x6F12,0x0000},
{0x602A,0x13EE},
{0x6F12,0x0001},
{0x602A,0x13F2},
{0x6F12,0x0005},
{0x602A,0x13F6},
{0x6F12,0x0007},
{0x602A,0x13FA},
{0x6F12,0x0007},
{0x602A,0x13FE},
{0x6F12,0x0007},
{0x602A,0x1402},
{0x6F12,0x0007},
{0x602A,0x1406},
{0x6F12,0x0001},
{0x602A,0x140A},
{0x6F12,0x0001},
{0x602A,0x140E},
{0x6F12,0x0001},
{0x602A,0x1412},
{0x6F12,0x0001},
{0x602A,0x1416},
{0x6F12,0x0001},
{0x602A,0x141A},
{0x6F12,0x0000},
{0x602A,0x141E},
{0x6F12,0x0001},
{0x602A,0x1422},
{0x6F12,0x0001},
{0x602A,0x1426},
{0x6F12,0x0001},
{0x602A,0x142A},
{0x6F12,0x0001},
{0x602A,0x142E},
{0x6F12,0x0001},
{0x602A,0x1432},
{0x6F12,0x0001},
{0x602A,0x1436},
{0x6F12,0x0000},
{0x602A,0x143A},
{0x6F12,0x0001},
{0x602A,0x143E},
{0x6F12,0x0001},
{0x602A,0x1442},
{0x6F12,0x0000},
{0x602A,0x1446},
{0x6F12,0x0001},
{0x602A,0x17D6},
{0x6F12,0x000A},
{0x602A,0x1632},
{0x6F12,0x017E},
{0x0114,0x0100},
{0x0344,0x0004},
{0x0346,0x0004},
{0x0348,0x0503},
{0x034A,0x03C3},
{0x034C,0x0500},
{0x034E,0x03C0},
{0x0380,0x0001},
{0x0382,0x0001},
{0x0384,0x0001},
{0x0386,0x0001},
{0x0900,0x0011},
{0x0404,0x1000},
{0x0402,0x1010},
{0x0304,0x0004},
{0x030C,0x0000},
{0x0306,0x0078},
{0x0300,0x000A},
{0x030E,0x0004},
{0x0312,0x0001},
{0x0310,0x0085},
{0x0202,0x0059},
{0x0342,0x0A18},
{0x0340,0x0E82},
{0x602A,0x1186},
{0x6F12,0x0203},
{0x602A,0x1184},
{0x6F12,0x0201},
{0x602A,0x11AA},
{0x6F12,0x0100},
{0x602A,0x1F90},
{0x6F12,0x0F25},
{0x6F12,0x0008},
{0x6F12,0x0711},
{0x6F12,0x0F10},
{0x6F12,0x2E2F},
{0x6F12,0x0E32},
{0x6F12,0x2830},
{0x6F12,0x2627},
{0x602A,0x1FC0},
{0x6F12,0x0001},
{0x6F12,0x10A6},
{0x6F12,0x0000},
{0x6F12,0x00C0},
{0x6F12,0x1300},
{0x6F12,0x8780},
{0x6F12,0x100F},
{0x6F12,0x620F},
{0x602A,0x1FF0},
{0x6F12,0x0001},
{0x6F12,0x2500},
{0x6F12,0x0102},
{0x6F12,0x0304},
{0x6F12,0x0506},
{0x6F12,0x0708},
{0x6F12,0x090A},
{0x6F12,0x0B0C},
{0x6F12,0x0D0E},
{0x6F12,0x0F10},
{0x6F12,0x1112},
{0x6F12,0x1314},
{0x6F12,0x1516},
{0x6F12,0x1718},
{0x6F12,0x191A},
{0x6F12,0x1B1C},
{0x6F12,0x1E1F},
{0x6F12,0x2021},
{0x6F12,0x2223},
{0x6F12,0x2425},
{0x602A,0x2024},
{0x6F12,0x0014},
{0x6F12,0xFFFF},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x602A,0x46EC},
{0x6F12,0x0009},
{0x602A,0x19D0},
{0x6F12,0x143C},
{0x602A,0x12DE},
{0x6F12,0x0010},
{0x602A,0x1130},
{0x6F12,0x0001},
{0x602A,0x2050},
{0x6F12,0x0200},
{0x602A,0x470E},
{0x6F12,0x0008},
{0x602A,0x46EE},
{0x6F12,0x0013},
{0x6F12,0x0030},
{0x6F12,0x0020},
{0x6F12,0x0014},
{0x6F12,0x0080},
{0x6F12,0x0000},
{0x6F12,0x0001},
{0x6F12,0x0001},
{0x6F12,0x0000},
{0x602A,0x4710},
{0x6F12,0x0001},
{0x0118,0x0102},
{0x0116,0x3001},
{0x602A,0x2130},
{0x6F12,0x0005},
{0x011A,0x0000},
{0x602A,0x122A},
{0x6F12,0x0001},
{0x6F12,0x2C00},
{0x011C,0x0000},
{0x602A,0x126C},
{0x6F12,0x0000},
{0x6F12,0x0203},
{0x602A,0x10EA},
{0x6F12,0x0101},
{0x602A,0x1270},
{0x6F12,0x0200},
{0x02F0,0x0003},
{0x02F2,0x0064},
{0x02F4,0x0000},
{0x02F6,0x0002},
{0x02F8,0x0003},
{0x02FA,0x0050},
{0x02FC,0x0000},
{0x02FE,0x0002},
{0x602A,0x1272},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x602A,0x1F00},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x602A,0x1196},
{0x6F12,0x0004},
{0x6F12,0x101B},
{0x6F12,0x101B},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x010A},
{0x623C,0x4040},
{0x623E,0x3A00},
{0x6240,0x0024},
{0x6242,0x0000},
{0x793E,0x2000},
{0x7938,0x0000},
{0x602A,0x12D2},
{0x6F12,0x0100},
{0x0112,0x0A0A},
{0x602A,0x1B3E},
{0x6F12,0x1F02},
{0x602A,0x1184},
{0x6F12,0x0201},
{0x602A,0x17D0},
{0x6F12,0x0100},
{0x602A,0x1112},
{0x6F12,0x0A00},
{0x602A,0x1240},
{0x6F12,0x0002},
{0x602A,0x2052},
{0x6F12,0x0000},
{0x602A,0x4700},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x602A,0x4708},
{0x6F12,0x0000},
{0x6F12,0x0000},
{0x602A,0x4706},
{0x6F12,0x0000},
{0x602A,0x470C},
{0x6F12,0x0000},
{0x6F12,0x0008},
{0x602A,0x4712},
{0x6F12,0x0000},
{0x602A,0x1100},
{0x6F12,0x1870},
{0x6F12,0x178F},
{0x602A,0x4710},
{0x6F12,0x0001},
{0x6214,0xF970},
{0x6218,0xF970},
{0x0A00,0x0100},
//{0x0100,0x0100}, //start mipi at stream()
{0x0000,0x0000}, //end
};
static const struct s5k33d_mode supported_modes[] = {
{
.width = 1280,
.height = 962,
.max_fps = {
.numerator = 10000,
.denominator = 300000,
},
.exp_def = 1552,//
.hts_def = 1552,//2584,//1280 +769 + 1280,//
.vts_def = 3092, //3714,// 962 + 256 + 962,//
.reg_list = s5k33d_global_regs_r1a,
},
};
static const s64 link_freq_menu_items[] = {
S5K33D_LINK_FREQ_1600MHZ
};
/* Write registers up to 4 at a time */
/*static int s5k33d_write_reg(struct i2c_client *client, u16 reg,
u32 len, u16 val)
{
//s5k33d_write_reg(client, regs[i].addr,S5K33D_REG_VALUE_16BIT,regs[i].val);
u32 buf_i, val_i;
u8 buf[4];
u8 *val_p;
__be32 val_be;
//__be16 val_be;
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (len > 4)
return -EINVAL;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
val_be = cpu_to_be16(val);
val_p = (u8 *)&val_be;
buf_i = 2;
val_i = 4 - buf_i;//2
while (val_i < 4)
buf[buf_i++] = val_p[val_i++];//2,3
if (i2c_master_send(client, buf, len + 2) != len + 2)
return -EIO;
// printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return 0;
}*/
/* Write registers up to 4 at a time */
static int s5k33d_write_reg(struct i2c_client *client, u16 reg,
u32 len, u32 val)
{
u32 buf_i, val_i;
u8 buf[6];
u8 *val_p;
__be32 val_be;
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (len > 4)
return -EINVAL;
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
val_be = cpu_to_be32(val);
val_p = (u8 *)&val_be;
buf_i = 2;
val_i = 4 - len;
while (val_i < 4)
buf[buf_i++] = val_p[val_i++];
if (i2c_master_send(client, buf, len + 2) != len + 2)
return -EIO;
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return 0;
}
static int s5k33d_write_array(struct i2c_client *client,
const struct regval *regs)
{
u32 i;
int ret = 0;
//("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
//for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
for (i = 0; ret == 0 && regs[i].addr != 0; i++)
{
ret = s5k33d_write_reg(client, regs[i].addr,S5K33D_REG_VALUE_16BIT,regs[i].val);
//udelay(100);
}
//while(1){};
msleep(1000);
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return ret;
}
/* Read registers up to 4 at a time */
static int s5k33d_read_reg(struct i2c_client *client, u16 reg,
unsigned int len, u32 *val)
{
struct i2c_msg msgs[2];
u8 *data_be_p;
__be32 data_be = 0;
__be16 reg_addr_be = cpu_to_be16(reg);
int ret;
// printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (len > 4 || !len)
return -EINVAL;
data_be_p = (u8 *)&data_be;
/* Write register address */
msgs[0].addr = client->addr;
msgs[0].flags = 0;
msgs[0].len = 2;
msgs[0].buf = (u8 *)®_addr_be;
/* Read data from register */
msgs[1].addr = client->addr;
msgs[1].flags = I2C_M_RD;
msgs[1].len = len;
msgs[1].buf = &data_be_p[4 - len];
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
*val = be32_to_cpu(data_be);
if (ret != ARRAY_SIZE(msgs))
return -EIO;
*val = be32_to_cpu(data_be);
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return 0;
}
static int s5k33d_get_reso_dist(const struct s5k33d_mode *mode,
struct v4l2_mbus_framefmt *framefmt)
{
return abs(mode->width - framefmt->width) +
abs(mode->height - framefmt->height);
printk("******s5k33d_get_reso_dist framefmt height= %d*******\n",framefmt->height);
}
static const struct s5k33d_mode *
s5k33d_find_best_fit(struct v4l2_subdev_format *fmt)
{
struct v4l2_mbus_framefmt *framefmt = &fmt->format;
int dist;
int cur_best_fit = 0;
int cur_best_fit_dist = -1;
unsigned int i;
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
dist = s5k33d_get_reso_dist(&supported_modes[i], framefmt);
if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
cur_best_fit_dist = dist;
cur_best_fit = i;
}
}
printk("**********cur best fit dist = %d\n***********",cur_best_fit_dist);
return &supported_modes[cur_best_fit];
}
static int s5k33d_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
const struct s5k33d_mode *mode;
s64 h_blank, vblank_def;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
printk("*********s5k33d_set_fmt start***************\n");
mutex_lock(&s5k33d->mutex);
mode = s5k33d_find_best_fit(fmt);
fmt->format.code =MEDIA_BUS_FMT_SBGGR10_1X10;// MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE;// date 21-09-09
fmt->format.width = mode->width;
fmt->format.height = mode->height;
fmt->format.field = V4L2_FIELD_NONE;
printk("************fmt->format.width =%d,fmt->format.height =%d*************",fmt->format.width,fmt->format.height);
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
#else
mutex_unlock(&s5k33d->mutex);
printk("*********s5k33d_set_fmt error***************\n");
return -ENOTTY;
#endif
} else {
s5k33d->cur_mode = mode;
h_blank = mode->hts_def - mode->width;
__v4l2_ctrl_modify_range(s5k33d->hblank, h_blank,
h_blank, 1, h_blank);
vblank_def = mode->vts_def - mode->height;
__v4l2_ctrl_modify_range(s5k33d->vblank, vblank_def,
S5K33D_VTS_MAX - mode->height,
1, vblank_def);
printk("*********s5k33d_set_fmt okay***************\n");
}
mutex_unlock(&s5k33d->mutex);
printk("*********s5k33d_set_fmt end***************\n");
return 0;
}
static int s5k33d_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
const struct s5k33d_mode *mode = s5k33d->cur_mode;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
mutex_lock(&s5k33d->mutex);
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
#else
mutex_unlock(&s5k33d->mutex);
return -ENOTTY;
#endif
} else {
fmt->format.width = mode->width;
fmt->format.height = mode->height;
fmt->format.code =MEDIA_BUS_FMT_SBGGR10_1X10;// MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE;// date 21-09-09
fmt->format.field = V4L2_FIELD_NONE;
}
mutex_unlock(&s5k33d->mutex);
printk("************s5k33d_get_fmt:fmt->format.width =%d,fmt->format.height =%d*************",fmt->format.width,fmt->format.height);
return 0;
}
static int s5k33d_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (code->index != 0)
return -EINVAL;
code->code =MEDIA_BUS_FMT_SBGGR10_1X10;//MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE;// ; date 21-09-09;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return 0;
}
static int s5k33d_enum_frame_sizes(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_size_enum *fse)
{
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (fse->index >= ARRAY_SIZE(supported_modes))
return -EINVAL;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)//MEDIA_BUS_FMT_SBGGR10_1X10
return -EINVAL;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
fse->min_width = supported_modes[fse->index].width;
fse->max_width = supported_modes[fse->index].width;
fse->max_height = supported_modes[fse->index].height;
fse->min_height = supported_modes[fse->index].height;
return 0;
}
#if 0
static int s5k33d_enable_test_pattern(struct s5k33d *s5k33d, u32 pattern)
{
u32 val;
if (pattern)
val = (pattern - 1) | S5K33D_TEST_PATTERN_ENABLE;
else
val = S5K33D_TEST_PATTERN_DISABLE;
return s5k33d_write_reg(s5k33d->client,
S5K33D_REG_TEST_PATTERN,
S5K33D_REG_VALUE_16BIT,
val);
}
#endif
static int s5k33d_g_frame_interval(struct v4l2_subdev *sd,
struct v4l2_subdev_frame_interval *fi)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
const struct s5k33d_mode *mode = s5k33d->cur_mode;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
mutex_lock(&s5k33d->mutex);
fi->interval = mode->max_fps;
mutex_unlock(&s5k33d->mutex);
return 0;
}
static void s5k33d_get_module_inf(struct s5k33d *s5k33d,
struct rkmodule_inf *inf)
{
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
memset(inf, 0, sizeof(*inf));
strlcpy(inf->base.sensor, S5K33D_NAME, sizeof(inf->base.sensor));
strlcpy(inf->base.module, s5k33d->module_name,
sizeof(inf->base.module));
strlcpy(inf->base.lens, s5k33d->len_name, sizeof(inf->base.lens));
}
static long s5k33d_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
long ret = 0;
printk("@@@@@@@@@@@@@@@@@s5k33d_ioctl cmd =%d@@@@@@@@@@@@@@@@@\n", cmd);
switch (cmd) {
case RKMODULE_GET_MODULE_INFO:
s5k33d_get_module_inf(s5k33d, (struct rkmodule_inf *)arg);
break;
default:
//s5k33d_get_module_inf(s5k33d, (struct rkmodule_inf *)arg);
printk("@@@@@@@@@@@@@@@@@ default %s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
ret = -ENOIOCTLCMD; //date-21-09-27 comment
break;
}
return ret;
}
#ifdef CONFIG_COMPAT
static long s5k33d_compat_ioctl32(struct v4l2_subdev *sd,
unsigned int cmd, unsigned long arg)
{
void __user *up = compat_ptr(arg);
struct rkmodule_inf *inf;
struct rkmodule_awb_cfg *cfg;
long ret;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
switch (cmd) {
case RKMODULE_GET_MODULE_INFO:
inf = kzalloc(sizeof(*inf), GFP_KERNEL);
if (!inf) {
ret = -ENOMEM;
return ret;
}
ret = s5k33d_ioctl(sd, cmd, inf);
if (!ret)
ret = copy_to_user(up, inf, sizeof(*inf));
kfree(inf);
break;
case RKMODULE_AWB_CFG:
cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
if (!cfg) {
ret = -ENOMEM;
return ret;
}
ret = copy_from_user(cfg, up, sizeof(*cfg));
if (!ret)
ret = s5k33d_ioctl(sd, cmd, cfg);
kfree(cfg);
break;
default:
//ret = -ENOIOCTLCMD; date 21-09-27
break;
}
return ret;
}
#endif
static int __s5k33d_start_stream(struct s5k33d *s5k33d)
{
int ret;
printk("@@@@@@@@@@@@@@@@@ begin s5k33d_write_array %s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
ret = s5k33d_write_array(s5k33d->client, s5k33d->cur_mode->reg_list);
msleep(5);
if (ret)
return ret;
printk("@@@@@@@@@@@@@@@@@ end s5k33d_write_array %s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
/* In case these controls are set before streaming */
mutex_unlock(&s5k33d->mutex);
ret = v4l2_ctrl_handler_setup(&s5k33d->ctrl_handler);
mutex_lock(&s5k33d->mutex);
if (ret)
return ret;
msleep(1000);
return s5k33d_write_reg(s5k33d->client,
S5K33D_REG_CTRL_MODE,
S5K33D_REG_VALUE_16BIT,
S5K33D_MODE_STREAMING);
}
static int __s5k33d_stop_stream(struct s5k33d *s5k33d)
{
printk("*****************s5k33d stop stream*******************\n");
return s5k33d_write_reg(s5k33d->client,
S5K33D_REG_CTRL_MODE,
S5K33D_REG_VALUE_16BIT,
S5K33D_MODE_SW_STANDBY);
}
static int s5k33d_s_stream(struct v4l2_subdev *sd, int on)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
struct i2c_client *client = s5k33d->client;
int ret = 0;
printk("@@@@@@@@@@@@@@@@@%s, %d, on = %d, s5k33d->streaming = %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__, on, s5k33d->streaming);
mutex_lock(&s5k33d->mutex);
on = !!on;
if (on == s5k33d->streaming)
goto unlock_and_return;
printk("@@@@@@@@@@@@@@@@@ streaming on %s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (on) {
ret = pm_runtime_get_sync(&client->dev);
if (ret < 0) {
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
pm_runtime_put_noidle(&client->dev);
goto unlock_and_return;
}
ret = __s5k33d_start_stream(s5k33d);
printk("@@@@@@@@@@@@@@@@@ __s5k33d_start_stream %s, %d, ret = %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__, ret);
if (ret) {
v4l2_err(sd, "start stream failed while write regs\n");
pm_runtime_put(&client->dev);
goto unlock_and_return;
}
} else {
__s5k33d_stop_stream(s5k33d);
printk("@@@@@@@@@@@@@@__s5k33d_stop_stream %s,%d@@@@@@@@@@@@@@\n",__func__,__LINE__);
pm_runtime_put(&client->dev);
}
s5k33d->streaming = on;
unlock_and_return:
mutex_unlock(&s5k33d->mutex);
return ret;
}
int write_reg_test(struct i2c_client *client)
{
int ret=0;
u32 id = 0;
/*
printk("_______________write register test___________________\n");
ret = s5k33d_read_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT, &id);
printk("&&&&&&&&& 0x0340 = %d &&&&&&&&&\n", id);
printk("_________write register_________\n");
ret = s5k33d_write_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT,
0x1111);
ret = s5k33d_read_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT, &id);
*/
printk("&&&&&&&&& 0x0340 = %d &&&&&&&&&\n", id);
return ret;
}
static int s5k33d_s_power(struct v4l2_subdev *sd, int on)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
struct i2c_client *client = s5k33d->client;
int ret = 0;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
mutex_lock(&s5k33d->mutex);
/* If the power state is not modified - no work to do. */
if (s5k33d->power_on == !!on)
goto unlock_and_return;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (on) {
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
ret = pm_runtime_get_sync(&client->dev);
if (ret < 0) {
pm_runtime_put_noidle(&client->dev);
goto unlock_and_return;
}
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
//ret = s5k33d_write_array(s5k33d->client, s5k33d_global_regs);
//ret = write_reg_test(s5k33d->client);
ret = s5k33d_write_array(s5k33d->client, s5k33d->cur_mode->reg_list);
if (ret) {
v4l2_err(sd, "******could not set init registers*****\n");
pm_runtime_put_noidle(&client->dev);
goto unlock_and_return;
}
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@ LSI setting down OK!\n", __func__, __LINE__);
msleep(1000);
s5k33d->power_on = true;
} else {
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
pm_runtime_put(&client->dev);
s5k33d->power_on = false;
msleep(5000);
}
unlock_and_return:
mutex_unlock(&s5k33d->mutex);
printk("@@@@@@@@@@@@@@@@@%s, %d, ret = %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__, ret);
return ret;
}
/* Calculate the delay in us by clock rate and clock cycles */
static inline u32 s5k33d_cal_delay(u32 cycles)
{
return DIV_ROUND_UP(cycles, S5K33D_XVCLK_FREQ / 1000 / 1000);
}
static int __s5k33d_master_power_on(struct device *dev) {
struct s5k33d *s5k33d = s5k33d_master;
int ret;
if (!s5k33d) {
dev_err(dev, "no s5k33d master set\n");
return -EINVAL;
}
s5k33d_power_count++;
if (s5k33d_power_count > 1) {
ret = 0;
goto err_shortcut;
}
if (!IS_ERR_OR_NULL(s5k33d->pins_default)) {
ret = pinctrl_select_state(s5k33d->pinctrl,
s5k33d->pins_default);
if (ret < 0) {
dev_err(dev, "could not set pins\n");
goto err_pins;
}
}
ret = clk_set_rate(s5k33d->xvclk, S5K33D_XVCLK_FREQ);
if (ret < 0)
dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
if (clk_get_rate(s5k33d->xvclk) != S5K33D_XVCLK_FREQ)
dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
ret = clk_prepare_enable(s5k33d->xvclk);
ret = clk_enable(s5k33d->xvclk);
if (ret < 0) {
dev_err(dev, "Failed to enable xvclk\n");
goto err_clk;
}
if (!IS_ERR(s5k33d->reset_gpio))
gpiod_set_value_cansleep(s5k33d->reset_gpio, 1);
usleep_range(600, 800);
if (!IS_ERR(s5k33d->reset_gpio))
gpiod_set_value_cansleep(s5k33d->reset_gpio, 0);
usleep_range(600, 800);
ret = regulator_bulk_enable(S5K33D_NUM_SUPPLIES, s5k33d->supplies);
if (ret < 0) {
dev_err(dev, "Failed to enable regulators\n");
goto err_regulator;
}
printk("************ set gpio value ************");
if (!IS_ERR(s5k33d->reset_gpio))
{
printk("************ set reset_gpio value 1 ************");
gpiod_set_value_cansleep(s5k33d->reset_gpio, 1);
}
msleep(2);
//usleep_range(1000, 1500);
printk("$$$$$$$$$$$start mclk$$$$$$$$$$$$$\n");
return 0;
err_regulator:
clk_disable_unprepare(s5k33d->xvclk);
err_clk:
if (!IS_ERR_OR_NULL(s5k33d->pins_sleep)) {
int _ret;
_ret = pinctrl_select_state(s5k33d->pinctrl,s5k33d->pins_sleep);
if (ret < 0)
dev_dbg(dev, "could not set sleep pins\n");
}
err_pins:
s5k33d_power_count--;
err_shortcut:
return ret;
}
static void __s5k33d_master_power_off(struct device *dev)
{
struct s5k33d *s5k33d = s5k33d_master;
int ret;
printk("$$$$$$$$$$$start mclk$$$$$$$$$$$$$\n");
if (!s5k33d) {
dev_err(dev, "no s5k33d master set\n");
return;
}
s5k33d_power_count--;
if (s5k33d_power_count > 0) {
return;
}
clk_disable_unprepare(s5k33d->xvclk);
if (!IS_ERR(s5k33d->reset_gpio))
gpiod_set_value_cansleep(s5k33d->reset_gpio, 0);
if (!IS_ERR_OR_NULL(s5k33d->pins_sleep)) {
ret = pinctrl_select_state(s5k33d->pinctrl,
s5k33d->pins_sleep);
if (ret < 0)
dev_dbg(dev, "could not set pins\n");
}
regulator_bulk_disable(S5K33D_NUM_SUPPLIES, s5k33d->supplies);
printk("$$$$$$$$$$$start mclk$$$$$$$$$$$$$\n");
return;
}
static int __s5k33d_power_on(struct s5k33d *s5k33d)
{
int ret;
//u32 delay_us;
struct device *dev = &s5k33d->client->dev;
//struct i2c_client *client = s5k33d->client;
//unsigned short addr;
printk("begin __s5k33d_master_power_on ...\n");
mutex_lock(&s5k33d_power_mutex);
ret = __s5k33d_master_power_on(dev);// clk
if (ret) {
dev_err(dev, "could not power on, error %d\n", ret);
goto err_power;
}
//usleep_range(500, 1000);
//if (!IS_ERR(s5k33d->pwdn_gpio))
// gpiod_set_value_cansleep(s5k33d->pwdn_gpio, 0);
#if 0
/* 8192 cycles prior to first SCCB transaction */
delay_us = s5k33d_cal_delay(8192);
usleep_range(delay_us, delay_us * 2);
/* Change i2c address by programming SCCB_ID */
addr = client->addr;
if (addr != S5K33D_VENDOR_I2C_ADDR) {
client->addr = S5K33D_VENDOR_I2C_ADDR;
ret = s5k33d_write_reg(client, S5K33D_REG_SCCB_ID,
S5K33D_REG_VALUE_08BIT,
addr * 2);
if (ret) {
dev_err(dev, "write SCCB_ID failed\n");
goto err_i2c_addr;
}
client->addr = addr;
}
#endif
mutex_unlock(&s5k33d_power_mutex);
return 0;
#if 0
err_i2c_addr:
if (!IS_ERR(s5k33d->pwdn_gpio))
gpiod_set_value_cansleep(s5k33d->pwdn_gpio, 0);
__s5k33d_master_power_off(dev);
#endif
err_power:
mutex_unlock(&s5k33d_power_mutex);
return ret;
}
static void __s5k33d_power_off(struct s5k33d *s5k33d)
{
struct device *dev = &s5k33d->client->dev;
mutex_lock(&s5k33d_power_mutex);
//if (!IS_ERR(s5k33d->pwdn_gpio))
// gpiod_set_value_cansleep(s5k33d->pwdn_gpio, 0);
__s5k33d_master_power_off(dev);
mutex_unlock(&s5k33d_power_mutex);
}
static int s5k33d_runtime_resume(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct s5k33d *s5k33d = to_s5k33d(sd);
return __s5k33d_power_on(s5k33d);
}
static int s5k33d_runtime_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct s5k33d *s5k33d = to_s5k33d(sd);
__s5k33d_power_off(s5k33d);
return 0;
}
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
static int s5k33d_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
struct s5k33d *s5k33d = to_s5k33d(sd);
struct v4l2_mbus_framefmt *try_fmt =
v4l2_subdev_get_try_format(sd, fh->pad, 0);
const struct s5k33d_mode *def_mode = &supported_modes[0];
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
mutex_lock(&s5k33d->mutex);
/* Initialize try_fmt */
printk("************def_mode->width =%d,def_mode->height=%d*************",def_mode->width,def_mode->height);
try_fmt->width = def_mode->width;
try_fmt->height = def_mode->height;
try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;//MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE;// date 21-09-09
try_fmt->field = V4L2_FIELD_NONE;
mutex_unlock(&s5k33d->mutex);
/* No crop or compose */
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
return 0;
}
#endif
static int s5k33d_enum_frame_interval(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_interval_enum *fie)
{
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (fie->index >= ARRAY_SIZE(supported_modes))
return -EINVAL;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
if (fie->code != MEDIA_BUS_FMT_SBGGR10_1X10)//MEDIA_BUS_FMT_SBGGR10_1X10
return -EINVAL;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
fie->width = supported_modes[fie->index].width;
fie->height = supported_modes[fie->index].height;
fie->interval = supported_modes[fie->index].max_fps;
printk("************fie->width =%d,fie->height =%d*************",fie->width,fie->height);
return 0;
}
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
static const struct v4l2_subdev_internal_ops s5k33d_internal_ops = {
.open = s5k33d_open,
};
#endif
static const struct dev_pm_ops s5k33d_pm_ops = {
SET_RUNTIME_PM_OPS(s5k33d_runtime_suspend,
s5k33d_runtime_resume, NULL)
};
static const struct v4l2_subdev_core_ops s5k33d_core_ops = {
.s_power = s5k33d_s_power,
.ioctl = s5k33d_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl32 = s5k33d_compat_ioctl32,
#endif
};
static const struct v4l2_subdev_video_ops s5k33d_video_ops = {
.s_stream = s5k33d_s_stream,
.g_frame_interval = s5k33d_g_frame_interval,
};
static const struct v4l2_subdev_pad_ops s5k33d_pad_ops = {
.enum_mbus_code = s5k33d_enum_mbus_code,
.enum_frame_size = s5k33d_enum_frame_sizes,
.enum_frame_interval = s5k33d_enum_frame_interval,
.get_fmt = s5k33d_get_fmt,
.set_fmt = s5k33d_set_fmt,
};
static const struct v4l2_subdev_ops s5k33d_subdev_ops = {
.core = &s5k33d_core_ops,
.video = &s5k33d_video_ops,
.pad = &s5k33d_pad_ops,
};
#if 0
int s5k33d_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
{
printk("(((((((((((((((((((((((%s, %d)))))))))))))))))))\n", __func__, __LINE__);
return 0;
}
static const struct v4l2_ioctl_ops s5k33d_ioctl_ops = {
.vidioc_s_fmt_vid_cap = s5k33d_s_fmt_vid_cap,
};
static struct video_device s5k33d_video_device = {
.ioctl_ops = &s5k33d_ioctl_ops,
};
#endif
//struct v4l2_subdev *sd;
//video_device
#if 0
static int s5k33d_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)
{
printk("(((((((((((((((((((((((%s, %d)))))))))))))))))))\n", __func__, __LINE__);
return 0;
}
static const struct v4l2_ioctl_ops s5k33d_ioctl_ops = {
.vidioc_s_fmt_vid_cap = s5k33d_s_fmt_vid_cap,
};
static const struct video_device s5k33d_video_device = {
.ioctl_ops = &s5k33d_ioctl_ops,
};
#endif
static int s5k33d_set_ctrl(struct v4l2_ctrl *ctrl)
{
struct s5k33d *s5k33d = container_of(ctrl->handler,
struct s5k33d, ctrl_handler);
struct i2c_client *client = s5k33d->client;
s64 max;
int ret = 0;
//printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
/* Propagate change of current control to all related controls */
switch (ctrl->id) {
case V4L2_CID_VBLANK:
/* Update max exposure while meeting expected vblanking */
max = s5k33d->cur_mode->height + ctrl->val - 4;
__v4l2_ctrl_modify_range(s5k33d->exposure,
s5k33d->exposure->minimum, max,
s5k33d->exposure->step,
s5k33d->exposure->default_value);
break;
}
//printk("@@@@@@@@@@@@@@@@@%s, %d, ctrl->id = %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__, ctrl->id);
if (pm_runtime_get(&client->dev) <= 0)
return 0;
//printk("@@@@@@@@@@@@@@@@@V4L2_CID_VBLANK = %d, V4L2_CID_EXPOSURE = %d, V4L2_CID_ANALOGUE_GAIN = %d, V4L2_CID_VBLANK = %d, V4L2_CID_TEST_PATTERN = %d@@@@@@@@@@@@@@@@@\n",
//V4L2_CID_VBLANK, V4L2_CID_EXPOSURE, V4L2_CID_ANALOGUE_GAIN, V4L2_CID_VBLANK, V4L2_CID_TEST_PATTERN);
#if 0
switch (ctrl->id) {
case V4L2_CID_EXPOSURE:
/* 4 least significant bits of expsoure are fractional part */
ret = s5k33d_write_reg(s5k33d->client,
s5k33d_REG_EXPOSURE,
s5k33d_REG_VALUE_24BIT,
ctrl->val << 4);
break;
case V4L2_CID_ANALOGUE_GAIN:
ret = s5k33d_write_reg(ov13850->client,
s5k33d_REG_GAIN_H,
s5k33d_REG_VALUE_08BIT,
(ctrl->val >> s5k33d_GAIN_H_SHIFT) &
s5k33d_GAIN_H_MASK);
ret |= s5k33d_write_reg(s5k33d->client,
s5k33d_REG_GAIN_L,
s5k33d_REG_VALUE_08BIT,
ctrl->val & s5k33d_GAIN_L_MASK);
break;
case V4L2_CID_VBLANK:
ret = s5k33d_write_reg(ov13850->client,
s5k33d_REG_VTS,
s5k33d_REG_VALUE_16BIT,
ctrl->val + s5k33d->cur_mode->height);
break;
case V4L2_CID_TEST_PATTERN:
ret = s5k33d_enable_test_pattern(s5k33d, ctrl->val);
break;
default:
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
__func__, ctrl->id, ctrl->val);
break;
}
#endif
pm_runtime_put(&client->dev);
return ret;
}
static const struct v4l2_ctrl_ops s5k33d_ctrl_ops = {
.s_ctrl = s5k33d_set_ctrl,
};
static int s5k33d_initialize_controls(struct s5k33d *s5k33d)
{
const struct s5k33d_mode *mode;
struct v4l2_ctrl_handler *handler;
struct v4l2_ctrl *ctrl;
s64 exposure_max, vblank_def;
u32 h_blank;
int ret;
printk("@@@@@@@@@@@@@@@@@%s, %d@@@@@@@@@@@@@@@@@\n", __func__, __LINE__);
handler = &s5k33d->ctrl_handler;
mode = s5k33d->cur_mode;
ret = v4l2_ctrl_handler_init(handler, 8);
if (ret)
return ret;
handler->lock = &s5k33d->mutex;
ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
0, 0, link_freq_menu_items);
if (ctrl)
ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
0, S5K33D_PIXEL_RATE, 1, S5K33D_PIXEL_RATE);
h_blank = mode->hts_def - mode->width;
s5k33d->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
h_blank, h_blank, 1, h_blank);
if (s5k33d->hblank)
s5k33d->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
vblank_def = mode->vts_def - mode->height;
s5k33d->vblank = v4l2_ctrl_new_std(handler, &s5k33d_ctrl_ops,
V4L2_CID_VBLANK, vblank_def,
S5K33D_VTS_MAX - mode->height,
1, vblank_def);
exposure_max = mode->vts_def - 4;
s5k33d->exposure = v4l2_ctrl_new_std(handler, &s5k33d_ctrl_ops,
V4L2_CID_EXPOSURE, S5K33D_EXPOSURE_MIN,
exposure_max, S5K33D_EXPOSURE_STEP,
mode->exp_def);
s5k33d->anal_gain = v4l2_ctrl_new_std(handler, &s5k33d_ctrl_ops,
V4L2_CID_ANALOGUE_GAIN, S5K33D_GAIN_MIN,
S5K33D_GAIN_MAX, S5K33D_GAIN_STEP,
S5K33D_GAIN_DEFAULT);
#if 0
s5k33d->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
&s5k33d_ctrl_ops, V4L2_CID_TEST_PATTERN,
ARRAY_SIZE(s5k33d_test_pattern_menu) - 1,
0, 0, s5k33d_test_pattern_menu);
#endif
if (handler->error) {
ret = handler->error;
dev_err(&s5k33d->client->dev,
"Failed to init controls(%d)\n", ret);
goto err_free_handler;
}
s5k33d->subdev.ctrl_handler = handler;
return 0;
err_free_handler:
v4l2_ctrl_handler_free(handler);
return ret;
}
static int s5k33d_check_sensor_id(struct s5k33d *s5k33d,
struct i2c_client *client)
{
struct device *dev = &s5k33d->client->dev;
u32 id = 0;
int ret;
//u16 addr;
#if 0
ret = s5k33d_read_reg(client, S5K33D_REG_CHIP_ID,
S5K33D_REG_VALUE_16BIT, &id);
printk("^^^^^^^^^^^^^^^^^^^%d^^^^^^^^^^^^^^^^^^^\n", id);
printk("&&&&&&&&&&&&&&&&%2x&&&&&&&&&&&&&&&&&&&&\n", client->addr);
#endif
//addr = client->addr;
//client->addr = 0x22;
ret = s5k33d_read_reg(client, S5K33D_REG_CHIP_ID,
S5K33D_REG_VALUE_16BIT, &id);
printk("&&&&&&&&&&&&&&&&%d&&&&&&&&&&&&&&&&&&&&\n", id);
if (id != CHIP_ID) {
dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
//return -ENODEV;
}
ret = s5k33d_read_reg(client, S5K33D_CHIP_REVISION_REG,
S5K33D_REG_VALUE_16BIT, &id);
printk("&&&&&&&&&&&&&&&&%d&&&&&&&&&&&&&&&&&&&&\n", id);
//client->addr = addr;
if (ret) {
dev_err(dev, "Read chip revision register error\n");
return ret;
}
s5k33d_global_regs = s5k33d_global_regs_r1a;
dev_info(dev, "Detected S5K33d-sensorid-%04x sensor, REVISION 0x%x\n", CHIP_ID, id);
/*ret = s5k33d_read_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT, &id);
printk("&&&&&&&&& 0x0340 = %d &&&&&&&&&\n", id);
printk("_________write register_________\n");
ret = s5k33d_write_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT,
0x1111);
if (ret) {
dev_err(dev, "*************i2c write register error**************\n");
return ret;
}
ret = s5k33d_read_reg(client, 0x0340,
S5K33D_REG_VALUE_16BIT, &id);
printk("&&&&&&&&& 0x0340 = %d &&&&&&&&&\n", id);
*/
return 0;
}
static int s5k33d_configure_regulators(struct device *dev)
{
struct s5k33d *s5k33d = s5k33d_master;
unsigned int i;
if (!s5k33d) {
dev_err(dev, "no s5k33d master set\n");
return -EINVAL;
}
for (i = 0; i < S5K33D_NUM_SUPPLIES; i++)
s5k33d->supplies[i].supply = s5k33d_supply_names[i];
return devm_regulator_bulk_get(dev,
S5K33D_NUM_SUPPLIES,
s5k33d->supplies);
}
static void s5k33d_detach_master(void *data)
{
if (s5k33d_master == data)
s5k33d_master = NULL;
}
static int s5k33d_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct device *dev = &client->dev;
struct device_node *node = dev->of_node;
struct s5k33d *s5k33d;
struct v4l2_subdev *sd;
//char facing[2];
int ret;
printk("**********************s5k33d_probe******************************\n");
dev_info(dev, "driver version: %02x.%02x.%02x",
DRIVER_VERSION >> 16,
(DRIVER_VERSION & 0xff00) >> 8,
DRIVER_VERSION & 0x00ff);
s5k33d = devm_kzalloc(dev, sizeof(*s5k33d), GFP_KERNEL);
if (!s5k33d)
return -ENOMEM;
ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
&s5k33d->module_index);
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
&s5k33d->module_facing);
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
&s5k33d->module_name);
ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
&s5k33d->len_name);
if (ret) {
dev_err(dev, "could not get module information!\n");
return -EINVAL;
}
s5k33d->client = client;
s5k33d->cur_mode = &supported_modes[0];
if (!s5k33d_master) {
s5k33d_master = s5k33d;
devm_add_action(dev, s5k33d_detach_master, s5k33d);
}
if (s5k33d_master == s5k33d) {
printk("******s5k33d_master == s5k33d******\n");
s5k33d->xvclk = devm_clk_get(dev, "xvclk");
if (IS_ERR(s5k33d->xvclk)) {
dev_err(dev, "Failed to get xvclk\n");
return -EINVAL;
}
printk("******devm_clk_get(dev, xvclk)******\n");
//s5k33d->mipi_pwr_gpio = devm_gpiod_get(dev, "mipi-pwr", GPIOD_OUT_LOW);//date 21-08-13
//if (IS_ERR(s5k33d->mipi_pwr_gpio)) //date 21-08-13
//dev_warn(dev, "Failed to get power-gpios, maybe no use\n"); //date 21-08-13
s5k33d->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(s5k33d->reset_gpio))
dev_warn(dev, "Failed to get reset-gpios\n");
printk("******devm_clk_get(dev, reset)******\n");
ret = s5k33d_configure_regulators(dev);
if (ret) {
dev_err(dev, "Failed to get power regulators\n");
return ret;
}
s5k33d->pinctrl = devm_pinctrl_get(dev);
if (!IS_ERR(s5k33d->pinctrl)) {
s5k33d->pins_default =
pinctrl_lookup_state(s5k33d->pinctrl,
OF_CAMERA_PINCTRL_STATE_DEFAULT);
if (IS_ERR(s5k33d->pins_default))
dev_err(dev, "could not get default pinstate\n");
s5k33d->pins_sleep =
pinctrl_lookup_state(s5k33d->pinctrl,
OF_CAMERA_PINCTRL_STATE_SLEEP);
if (IS_ERR(s5k33d->pins_sleep))
dev_err(dev, "could not get sleep pinstate\n");
}
}
//s5k33d->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
//if (IS_ERR(s5k33d->pwdn_gpio))
//dev_warn(dev, "Failed to get pwdn-gpios\n");
//else
//gpiod_set_value_cansleep(s5k33d->pwdn_gpio, 0);
mutex_init(&s5k33d->mutex);
sd = &s5k33d->subdev;
//s5k33d_video_device
// printk("&s5k33d_ioctl_ops = %p\n", &s5k33d_ioctl_ops);
//sd->devnode = &s5k33d_video_device;
v4l2_i2c_subdev_init(sd, client, &s5k33d_subdev_ops);
ret = s5k33d_initialize_controls(s5k33d);
if (ret)
goto err_destroy_mutex;
ret = __s5k33d_power_on(s5k33d);
if (ret)
goto err_free_handler;
ret = s5k33d_check_sensor_id(s5k33d, client);
if (ret)
//goto err_power_off;
goto err_free_handler;
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sd->internal_ops = &s5k33d_internal_ops;
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
#endif
#if 1
#if defined(CONFIG_MEDIA_CONTROLLER)
s5k33d->pad.flags = MEDIA_PAD_FL_SOURCE;
sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; //MEDIA_ENT_T_V4L2_SUBDEV_SENSOR comment 21-08-12
//ret = media_entity_init(&sd->entity, 1, &s5k33d->pad, 0);
ret = media_entity_pads_init(&sd->entity, 1, &s5k33d->pad);
if (ret < 0)
//goto err_power_off;
goto err_free_handler;
#endif
#endif
#if 1
memset(facing, 0, sizeof(facing));
if (strcmp(s5k33d->module_facing, "back") == 0)
facing[0] = 'b';
else
facing[0] = 'f';
snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
s5k33d->module_index, facing,
S5K33D_NAME, dev_name(sd->dev));
ret = v4l2_async_register_subdev_sensor_common(sd);
if (ret) {
dev_err(dev, "v4l2 async register subdev failed\n");
goto err_clean_entity;
}
#endif
#if 0
ret = v4l2_async_register_subdev(sd);
if (ret < 0)
{
printk("v4l2_async_register_subdev err\n");
goto err_free_handler;
}
#endif
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
pm_runtime_idle(dev);
printk("******************s5k33d_probe success!********************\n");
return 0;
#if 1
err_clean_entity:
#if defined(CONFIG_MEDIA_CONTROLLER)
media_entity_cleanup(&sd->entity);
#endif
#endif
//err_power_off:
// __s5k33d_power_off(s5k33d);
err_free_handler:
v4l2_ctrl_handler_free(&s5k33d->ctrl_handler);
err_destroy_mutex:
mutex_destroy(&s5k33d->mutex);
return ret;
}
static int s5k33d_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct s5k33d *s5k33d = to_s5k33d(sd);
v4l2_async_unregister_subdev(sd);
#if defined(CONFIG_MEDIA_CONTROLLER)
media_entity_cleanup(&sd->entity);
#endif
v4l2_ctrl_handler_free(&s5k33d->ctrl_handler);
mutex_destroy(&s5k33d->mutex);
pm_runtime_disable(&client->dev);
if (!pm_runtime_status_suspended(&client->dev))
__s5k33d_power_off(s5k33d);
pm_runtime_set_suspended(&client->dev);
printk("**************s5k33d_remove****************\n");
return 0;
}
#if IS_ENABLED(CONFIG_OF)
static const struct of_device_id s5k33d_of_match[] = {
{ .compatible = "samsung,s5k33d" },
{},
};
MODULE_DEVICE_TABLE(of, s5k33d_of_match);
#endif
static const struct i2c_device_id s5k33d_match_id[] = {
{ "samsung,s5k33d", 0 },
{ },
};
static struct i2c_driver s5k33d_i2c_driver = {
.driver = {
.name = S5K33D_NAME,
.pm = &s5k33d_pm_ops,
.of_match_table = of_match_ptr(s5k33d_of_match),
},
.probe = &s5k33d_probe,
.remove = &s5k33d_remove,
.id_table = s5k33d_match_id,
};
static int __init sensor_mod_init(void)
{
return i2c_add_driver(&s5k33d_i2c_driver);
}
static void __exit sensor_mod_exit(void)
{
i2c_del_driver(&s5k33d_i2c_driver);
}
device_initcall_sync(sensor_mod_init);
module_exit(sensor_mod_exit);
MODULE_DESCRIPTION("samsung s5k33d sensor driver");
MODULE_LICENSE("GPL v2");