vlib work
do do/compile_rtl.do
do do/compile_sim.do
第三步 编写编译do文件
vlib work
##
vcom -work work ../RTL/*.vhd
vlog -work work ../RTL/*.vhd
第四步,编写仿真指令do文件
vlog -work work +define+tb_00=1 -work work +incdir+sim_model {sim_model/tb_TDC.v}
第五步,启动仿真do文件
##tb00.do
vlog +define+tb_00=1 -work work +incdir+sim_model {sim_model/tb_TDC.v}
vsim -gui -voptargs=+acc=rn +notimingchecks -t ps work.tb_start_stop_gen
set NumericStdNoWarnings 1
set StdArithNoWarnings 1
do wave/wave.do
run 2ms