HVT/SVT/LVT详解

名词解释:

HVT = high V threshold. Can be used in the path where timing is not critical. So by using HVT cells we can save power.

LVT - Low V threshold. One should use these cells in timing critical paths. These cells are fast but , comsumes more power due to its leakage. So it will consume more power. So use only when timing is critical.

SVT- Standard V threshold. Best of both world. Medium delay and medium power requirment. So if timing is not met by small magin with HVT, you should try with SVT. And at last LVT.

总结 1:

  • HVT --> Higher threshold Voltage --> More Delay, for IR drop issue use the HVT cells.
  • LVT --> Lower threshold Voltage --> Less Delay, for best timing use the LVT cells.

总结 2:

在这里插入图片描述

在一些timing-critical path上使用LVT/SLVT来获得更快的速度,对于一些sub timing critical path上可以使用HVT lib cell减少power.

在这里插入图片描述
总结 3:
interesting question : hvt/svt/lvt哪种cell的面积最小 ?-> the same.

hvt , lvt and svt all have the same area. there is a single layout done and VT layer is used to generate the other versions. This helps the chip level tools to swap the cells of different VT to achieve the timing and power goals that are set.

The cell area will be same irrespective of SVT/HVT/LVT.

The cell layout has many different layers, the difference between SVT & HVT cells are, VTH_P & VTH_N layers ( which are added in HVT Cells ), the difference between SVT & LVT cells are, VTL_P & VTl_N layers ( which are added in LVT Cells ).

VT layer signifies the Fab people that the oxide layer should be thick.So depending on the Vt layer the silicon dioxide thickness below the poly is varied.

Vt variation can be done by changing oxide thickness, but in advanced scaled technology nodes, this is achieved by varying channel doping or changing the gate metal work function (for high-K metal gate transistors). While drawing the layouts in a layout editor (Virtuoso in Cadence, for example), you’d specify whether the transistor type is high/standard/low VT. Some technology nodes have a ULVT device as well, depends on the Fab offering the device options.
HVT will have a high threshold voltage, hence lower leakage and lower current drive. This directly translates to lower active/dynamic power. The converse is true for the LVT or the lowest VT transistor option available.

总结

HVT 逻辑门的特点是速度慢,功耗低,因为其阈值电压高,所以需要更高的电压才能打开晶体管。SVT 逻辑门速度和功耗相对于 HVT 和 LVT 之间,因为其阈值电压在标准范围内。LVT 逻辑门速度快,功耗高,因为其阈值电压低,只需要较小的电压就可以打开晶体管。

在逻辑综合中,设计人员可以选择使用不同的 HVT/SVT/LVT 逻辑门,以满足特定的性能和功耗要求。例如,在需要低功耗的应用程序中,可以使用 HVT 逻辑门,而在需要更高性能的应用程序中,则可以使用 LVT 逻辑门。

在实际电路设计中,逻辑门的选择通常是由芯片制造工艺和应用程序的要求决定的。芯片制造商通常提供 HVT/SVT/LVT 逻辑库,以满足不同的应用需求。

需要注意的是,HVT/SVT/LVT 逻辑门的选择不仅仅取决于其速度和功耗特性,还与电压和温度等因素有关。在实际设计中,设计人员需要仔细评估不同逻辑门的特性,以选择最适合应用程序要求的逻辑门。

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