Verilog :FSM2型（异步复位/同步复位）

异步复位传送门：

Fsm2 - HDL其 (01xz.net)https://hdlbits.01xz.net/wiki/Fsm2

这是一个摩尔状态机，具有两个状态、两个输入和一个输出。实现此状态机。

本练习与FSM2S，但使用异步复位。

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异步复位代码:

module top_module(
    input clk,
    input areset,    // Asynchronous reset to OFF
    input j,
    input k,
    output out); //  

    parameter OFF=0, ON=1; 
    reg state, next_state;

    always @(*) begin
        // State transition logic
        if(state== OFF)begin
            next_state = j?ON:OFF;
        end
        else if(state== ON)begin
            next_state = k?OFF:ON;
        end
    end

    always @(posedge clk, posedge areset) begin
        // State flip-flops with asynchronous reset
        if(areset)
            state <= OFF;
        else state <= next_state;
    end

    // Output logic
    assign out = state;

endmodule

同步复位传送门：

Fsm2s - HDL其 (01xz.net)https://hdlbits.01xz.net/wiki/Fsm2s异步复位代码：

module top_module(
    input clk,
    input reset,    // Synchronous reset to OFF
    input j,
    input k,
    output out); //  

    parameter OFF=0, ON=1; 
    reg state, next_state;

    always @(*) begin
        // State transition logic
        if(state== OFF)begin
            next_state = j?ON:OFF;
        end
        else if(state== ON)begin
            next_state = k?OFF:ON;
        end
    end

    always @(posedge clk) begin
        // State flip-flops with asynchronous reset
        if(reset)
            state <= OFF;
        else state <= next_state;
    end

    // Output logic
    assign out = state;

endmodule