-----------------------------------------------------------------------------1、分频的方法---------------------------------------------------------------------------------------------------------------------
- 奇分频,这里以5分频为例进行记录
- 波形绘制
- RTL代码
module divide_five( input wire sys_clk, input wire sys_rst_n, output wire clk_out ); reg [2:0] cnt; reg clk1; reg clk2; always@(posedge sys_clk or negedge sys_rst_n) if(!sys_rst_n) cnt <= 3'd0; else if(cnt == 3'd4) cnt <= 3'd0; else cnt <= cnt + 3'd1; always@(posedge sys_clk or negedge sys_rst_n) if(!sys_rst_n) clk1 <= 1'b0; else if(cnt == 3'd2) clk1 <= 1'b1; else if(cnt == 3'd4) clk1 <= 1'b0; else clk1 <= clk1; always@(negedge sys_clk or negedge sys_rst_n) if(!sys_rst_n) clk2 <= 1'b0; else if(cnt == 3'd2) clk2 <= 1'b1; else if(cnt == 3'd4) clk2 <= 1'b0; else clk2 <= clk2; assign clk_out = clk1 |clk2; endmodule
- 仿真代码
`timescale 1ns/1ns module devide_five_tb(); reg sys_clk; reg sys_rst_n; wire clk_out; initial begin sys_clk = 1'b1; sys_rst_n <= 1'b0; #20 sys_rst_n <= 1'b1; end always #10 sys_clk = ~sys_clk; module devide_five( .sys_clk(sys_clk), .sys_rst_n(sys_rst_n), .clk_out(clk_out) ); endmodule
- 仿真结果
-----------------------------------------------------------------------------2、降频的方法--------------------------------------------------------------------------------------------------------------------
- 波形绘制
- RTL代码
module divide_five( input wire sys_clk, input wire sys_rst_n, output wire cnt_flag ); reg [2:0] cnt; reg cnt_flag; always@(posedge sys_clk or negedge sys_rst_n) if(!sys_rst_n) cnt <= 3'd0; else if(cnt == 3'd4) cnt <= 3'd0; else cnt <= cnt + 3'd1; always@(posedge sys_clk or negedge sys_rst_n) if(!sys_rst_n) cnt_flag <= 1'b0; else if(cnt == 3'd3) cnt_flag <= 1'b1; else cnt_flag <= 1'b0; endmodule
- 仿真代码
-
`timescale 1ns/1ns module devide_five_tb(); reg sys_clk; reg sys_rst_n; wire clk_flag; initial begin sys_clk = 1'b1; sys_rst_n <= 1'b0; #20 sys_rst_n <= 1'b1; end always #10 sys_clk = ~sys_clk; module devide_five( .sys_clk(sys_clk), .sys_rst_n(sys_rst_n), .clk_flag(clk_flag) ); endmodule
- 仿真波形