脉冲计数器,
实验一:进行模块化复用
pulse_counter为基础脉冲计数器,为被复用模块
`timescale 1ns/1ps
module pulse_counter(
input clk,
input rst_n,
output reg[3:0] pulse_cnt,
output reg pulse
);
localparam CNT_MAX=10;
always@(posedge clk)begin
if(!rst_n) pulse_cnt=0;
else if(pulse_cnt<CNT_MAX)begin
pulse_cnt=pulse_cnt+1'b1;
end
else pulse_cnt=0;
end
always@(posedge clk)begin
if(!rst_n) pulse<=0;
else if(pulse_cnt==CNT_MAX) pulse<=1;
else pulse<=0;
end
endmodule
multi_pulse.v
`timescale 1ns/1ps
module multi_pulse(
input clk1,
input clk2,
input rst_n,
output [3:0] pulse_cnt1,
output [3:0] pulse_cnt2
);
wire pulse1;
wire pulse2;
pulse_counter pulse_counter1(
.clk(clk1),
.rst_n(rst_n),
.pulse_cnt(pulse_cnt1),
.pulse(pulse1)
);
pulse_counter pulse_counter2(
.clk(clk2),
.