[DRC RTSTAT-1] Unrouted nets: 1 net(s) are unrouted

[DRC RTSTAT-1] Unrouted nets: 1 net(s) are unrouted. The problem bus(es) and/or net(s) are system_i/dru_clk/gt_refclk_buf/U0/IBUF_OUT[0].

CRITICAL WARNING: [Route 35-54] Net: system_i/dru_clk/gt_refclk_buf/U0/IBUF_OUT[0] is not completely routed.
Resolution: Run report_route_status for more information.

Unroutable connection Types: 
----------------------------
Checking all reachable nodes within 5 hops of driver and load 

Unroute Type 1 : Site pin does not reach interconnect fabric

    Type 1GTHE4_COMMON.MGTREFCLK1->GTHE4_CHANNEL.SOUTHREFCLK1]
    -----Num Open nets: 3
    -----Representative Net: Net[29163] system_i/dru_clk/gt_refclk_buf/U0/IBUF_OUT[0]
    -----GTHE4_COMMON_X0Y3/MGTREFCLK1 -> GTHE4_CHANNEL_X0Y16/SOUTHREFCLK1
    -----Driver Term: system_i/dru_clk/gt_refclk_buf/U0/USE_IBUFDS_GTE4.GEN_IBUFDS_GTE4[0].IBUFDS_GTE4_I/O Load Term [97746]: system_i/vid_phy_controller/inst/gt_wrapper_inst/inst/gen_gtwizard_gthe4_top.system_vid_phy_controller_0_gtwrapper_gtwizard_gthe4_inst/gen_gtwizard_gthe4.gen_channel_container[0].gen_enabled_channel.gthe4_channel_wrapper_inst/channel_inst/gthe4_channel_gen.gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST/GTSOUTHREFCLK1
    Driver Pin does not reach Interconnect fabric within 5 hops.
    Load Pin does not reach Interconnect fabric within 5 hops 
    Pins Reached within 5 hops from Driver
    GTHE4_CHANNEL_X0Y14/MGTREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y15/MGTREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y13/MGTREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y12/MGTREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y3/COM0_REFCLKOUT1 Net on Pin: 
    GTHE4_COMMON_X0Y3/COM2_REFCLKOUT1 Net on Pin: 
    GTHE4_CHANNEL_X0Y18/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y19/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y17/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y16/NORTHREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y4/COM0_REFCLKOUT2 Net on Pin: 
    GTHE4_COMMON_X0Y4/COM2_REFCLKOUT2 Net on Pin: 
    GTHE4_CHANNEL_X0Y18/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y19/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y17/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y16/NORTHREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y4/COM0_REFCLKOUT3 Net on Pin: 
    GTHE4_COMMON_X0Y4/COM2_REFCLKOUT3 Net on Pin: 
    GTHE4_CHANNEL_X0Y10/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y11/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y9/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y8/SOUTHREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y2/COM0_REFCLKOUT4 Net on Pin: 
    GTHE4_COMMON_X0Y2/COM2_REFCLKOUT4 Net on Pin: 
    GTHE4_CHANNEL_X0Y10/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y11/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y9/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y8/SOUTHREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y2/COM0_REFCLKOUT5 Net on Pin: 
    GTHE4_COMMON_X0Y2/COM2_REFCLKOUT5 Net on Pin: 
    GTHE4_CHANNEL_X0Y22/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y23/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y21/NORTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y20/NORTHREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y5/COM0_REFCLKOUT2 Net on Pin: 
    GTHE4_COMMON_X0Y5/COM2_REFCLKOUT2 Net on Pin: 
    GTHE4_CHANNEL_X0Y22/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y23/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y21/NORTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y20/NORTHREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y5/COM0_REFCLKOUT3 Net on Pin: 
    GTHE4_COMMON_X0Y5/COM2_REFCLKOUT3 Net on Pin: 
    GTHE4_CHANNEL_X0Y6/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y7/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y5/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y4/SOUTHREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y1/COM0_REFCLKOUT4 Net on Pin: 
    GTHE4_COMMON_X0Y1/COM2_REFCLKOUT4 Net on Pin: 
    GTHE4_CHANNEL_X0Y6/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y7/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y5/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y4/SOUTHREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y1/COM0_REFCLKOUT5 Net on Pin: 
    GTHE4_COMMON_X0Y1/COM2_REFCLKOUT5 Net on Pin: 
    GTHE4_CHANNEL_X0Y2/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y3/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y1/SOUTHREFCLK0 Net on Pin: 
    GTHE4_CHANNEL_X0Y0/SOUTHREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y0/COM0_REFCLKOUT4 Net on Pin: 
    GTHE4_COMMON_X0Y0/COM2_REFCLKOUT4 Net on Pin: 
    GTHE4_CHANNEL_X0Y2/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y3/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y1/SOUTHREFCLK1 Net on Pin: 
    GTHE4_CHANNEL_X0Y0/SOUTHREFCLK1 Net on Pin: 
    GTHE4_COMMON_X0Y0/COM0_REFCLKOUT5 Net on Pin: 
    GTHE4_COMMON_X0Y0/COM2_REFCLKOUT5 Net on Pin: 
    Pins Reached within 5 hops from Load
    GTHE4_COMMON_X0Y5/MGTREFCLK0 Net on Pin: 
    GTHE4_COMMON_X0Y5/MGTREFCLK1 Net on Pin: 
Phase 3.1 Initial Routing Verification | Checksum: 1a9ae94ae

 

主要问题：

1、    GTHE4_CHANNEL_X0Y1/SOUTHREFCLK0 Net on Pin:     GTHE4_CHANNEL_X0Y1/SOUTHREFCLK1 Net on Pin: 

2、    GTHE4_CHANNEL_X0Y18/NORTHREFCLK0 Net on Pin:     GTHE4_CHANNEL_X0Y18/NORTHREFCLK1 Net on Pin: 

可以根据提示查找SOUTHREFCLK0，SOUTHREFCLK1。NORTHREFCLK0，NORTHREFCLK1。

这些gt信号参考时钟的配置位置。

set_property -dict [list CONFIG.CHANNEL_ENABLE {X0Y16 X0Y17 X0Y18} CONFIG.CHANNEL_SITE {X0Y16}] [get_bd_cells vid_phy_controller]

我的问题修改之后正常。