PT Report_timing –path_type的区别

（1） report_timing –path_type summary

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-delay type max
-path_type summary

Startpoint	endpoint	slack
Core/spi/spi_tfifo/rp_reg_0_/CP	PAD_SPIMISO (inout)	-1.12

（2） report_timing –path_type end

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-delay type max
-path_type end

Endpoint	Path Delay	path required	CRP	slack
PAD_SPIMISO	61.12 r	60.00	0.00	-0.2

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（3） report_timing –path_type short

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-delay type max
-path_type short

Startpoint: Core/spi/spi_tfifo/rp_reg_0_/
Endpoint: PAD_SPIMISO （output port clocked by spi_slv_clk）
Path Group: REGOUT

Point	incr	Path
Clock spi_slv_clk’(rise edge 反向)	28.00	28.00
Clock network delay (propagated)	5.51	33.51
Core/spi/spi_tfifo/rp_reg_0_/CP	0.00	33.51 r
Core/spi/spi_tfifo/rp_reg_0_/Q	1.10 &	33.61 f
… （short省略）
PAD_SPIMISO (inout)	15.11&	61.12 r
Data arrival time		61.12
Clock spi_slv_clk (rise edge)	56.00	56.00
Clock network delay (propagated)	0.00	56.00
Clk reconvergence pessimism	0.00	0.00
Clock uncertainty	3.0	59.0
Output external delay	1.0	60.0
Data required time		60.0
Slack(Violated)		-1.21

（4） report_timing –path_type full_clock

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-delay type full_clock
-path_type short

Startpoint: Core/spi/spi_tfifo/rp_reg_0_/
Endpoint: PAD_SPIMISO （output port clocked by spi_slv_clk）
Path Group: REGOUT

Point	incr	Path
Clock spi_slv_clk’(rise edge 反向)	28.00	28.00
Clock source latency
PAD_SPICLK(inout)
Pad/SPICLK_PAD/PAD
Pad/SPICLK_PAD/IN
Core/pinmux/CTS_a/Z
Core/spi/clk_gate_rp/latch/clkg
… … ….
Data arrival time
Clock spi_slv_clk（rise edge）
… … …
Slack (Violated)

（5） report_timing –path_type full_clock_expanded （对于generated clock， 补充main clock部分）

（6）-input_pins （不能用于比full短的报告类型）

Clock pclk
… …. ….
Core/uart/U001/I
Core/uart/U001/ZN
Core/uart/U002/A1
Core/uart/U002/ZN
… … …

（7）-input_pins -nets -transition_time（不能用于比full短的报告类型）

Point	Fanout	Trans	Incr	Path
Clock pclk			0.0	0.0
… …. …
Core/mux1 (net)	1		0.0	57.0
Core/uart/U001/I		0.05	0.6	57.6
Core/uart/U001/ZN		0.13	0.45	58.05
Core/uart/n232 (net)	2		0.0	79.1
Core/uart/U002/A1		0.19	0.0	79.1
Core/uart/U002/ZN		0.23	0.9	80.0