%% 产生了一组有符号型数据,传给FPGA进行处理,
%% FPGA的IP核处理有符号数时就是以补码形式进行处理的
clear all;close all;clc;
fs = 50e6;
f0 = 200e3;
W = 16; %数据位宽16位
N = 1024;
t = [0:N-1]/fs;
yr = cos(2*pi*f0*t);
yi = sin(2*pi*f0*t);
% yr_N =round( yr*(2^(W-1)-1) + (2^(W-1)-1) );
% yi_N =round( yi*(2^(W-1)-1) + (2^(W-1)-1) );
% yr =round( yr*(2^(W-1)-1)); %W位的符号数,正数最大值为2^(W-1)-1,如W=4,则正数最大为7,这是幅度最大值,单负数最大为-2^(W-1) = -8,
% yi =round( yi*(2^(W-1)-1));
yr =round( yr*(2^(W-1))); %W位的符号数,正数最大值为2^(W-1)-1,如W=4,则正数最大为7,这是幅度最大值,单负数最大为-2^(W-1) = -8,
yi =round( yi*(2^(W-1)));
mag = abs(yr + j*yi);
figure
plot(t,yr,t,yi)
title('MATLAB显示数据')
sign_r = yr<0;
sign_i = yi<0;
yr_N = yr + sign_r*2^W;
yi_N = yi + sign_i*2^W;
figure
plot(t,yr_N,'r')
title('FPGA显示数据,二进制补码符号数')
fid_r = fopen('real_input.txt','w');
fprintf(fid_r,'%X\n',yr_N);
fclose(fid_r);
fid_i = fopen('imag_input.txt','w');
fprintf(fid_i,'%X\n',yi_N);
fclose(fid_i);
结果: