VDMA寄存器操作

最新推荐文章于 2022-09-19 21:49:07 发布

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最新推荐文章于 2022-09-19 21:49:07 发布

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文章标签： fpga开发

本文链接：https://blog.csdn.net/RayAdass/article/details/126929443

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xil_printf("//****************VDMA Init Start*********************//\r\n ");
	//控制寄存器
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x00,0x00010083);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x30,0x00010083);
	//起始地址
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x5c,DDR_BASE_ADDR);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x5c+0x4,DDR_BASE_ADDR+0x02000000);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x5c+0x8,DDR_BASE_ADDR+0x04000000);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xac,DDR_BASE_ADDR);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xac+0x4,DDR_BASE_ADDR+0x02000000);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xac+0x8,DDR_BASE_ADDR+0x04000000);
	//stride
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x58,1920*3);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xa8,1920*3);
	//hsize
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x54,1920*3);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xa4,1920*3);
	//vsize
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0x50,1080);
	XAxiVdma_WriteReg(VDMA_BASE_ADDR,0xa0,1080);
	xil_printf("//****************VDMA Init Done*********************//\r\n ");