[UVM]UVM Register Model應用實例（Example）

                          UVM Register Model Example

 

       In this section will see an example that shows one of the ways to access DUT registers with the UVM RAL Model.Let’s consider a DMA design which consists of registers in it and reg_interface is used to access the registers.Below is the block diagram of DMA.

 

• Table of Contents

一、DMA方塊圖(DMA block diagram)

二、下面是DMA registers定定義

三、測試環境框圖（testbench block diagram）

四、UVM RAL Model創建步驟

4.1、Writing register classes

4.2、Writing register package

4.3、Instantiation of register classes in register package

4.4、Writing Adapter Class

4.5、在env中例化register packet和adapter

4.6、Accessing registers with RAL

4.7、Complete Sequence Code

4.8、Test case

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一、DMA方塊圖(DMA block diagram)

                    

 

二、下面是DMA registers定定義

• INTR
• CTRL
• IO_ADDR
• MEM_ADDR

Register Name	Address	Field Name	MSB	LSB	Access	skip_reg_test	skip_reg_field
INTR	0x3580_0000	mask	31	16	RW
		status	15	0
CTRL	0x3580_0004	resvd	31	10	RW
		io_mem	9	9