low power design------UG reading

MSV：multiple supply voltage

multiple supply single voltage、multiple supply multiple voltage

A non default and non virtual power domain has a fence constraintant physically; each power domain has a specific library (.lib、.lef) associated with it.

CPF(common power format):

can freely exchange data between cadence tools supporting the low power design flows, capture low power design intent early in the design process rather than late in the back-end cycle.  A CPF file captures all design and technology-related power constraints, which can be used throughout the design flow.

The init_design then loads the libraries and sets up MMMC based on the viewDefinition.tcl.

low power cell:

Isolation Cell\Always-On Cell\State Retention DFF\Power Gate or Power Switch Cell\Level Shifter Cell\Level Shifter/Isolation Combo Cell\Voltage Regulator Cell (Optional on-chip)\Specifying Power Intent\Power Intent File

Multiple Supply Voltage Top-Down Hierarchical Flow 

Multiple Supply Voltage Bottom-Up Hierarchical Flow