在FPGA中可以
module LOOP1();
integer i;
initial
begin
for(i=0;i<4;i=i+1) //for语句
begin
$display("i=%h",i);
end
end
endmodule
module LOOP2();
integer i;
initial
begin
i = 0;
while(i<4)
begin
$display("i = %h",i);
i = i + 1;
end
end
endmodule
module LOOP3();
integer i;
initial
begin
i = 0;
repeat(4)
begin
$display("i=%h",i);
i = i+1;
end
end
endmodule