FPGA学习日记（13）--呼吸灯

 

 

module breath_led
#(
    parameter CNT_1S_MAX = 10'd999  ,
    parameter CNT_1MS_MAX = 10'd999 ,
    parameter CNT_1US_MAX = 6'd49   

)
(
    input wire sys_clk      ,
    input wire sys_rst_n    ,
    
    output reg led_out
);
reg [9:0] cnt_1s;
reg [9:0] cnt_1ms;//最大计数值999，十位宽
reg [5:0] cnt_1us;//最大计数值49 ，需要六位

reg       cnt_en;

//1us计数器
always@(posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)  
        cnt_1us <= 6'd0;
    else if(cnt_1us == CNT_1US_MAX)
        cnt_1us <= 6'd0;
    else
        cnt_1us <= cnt_1us + 6'd1;
        
//1ms计数器
always@(posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)  
        cnt_1ms <= 10'd0;
    else if ((cnt_1us == CNT_1US_MAX)&&(cnt_1ms == CNT_1MS_MAX))
        cnt_1ms <= 10'd0;
    else  if(cnt_1us == CNT_1US_MAX)  //1us计数器完成计数

        cnt_1ms <= cnt_1ms + 10'd1;
    else 
        cnt_1ms <= cnt_1ms;
        
//1s计数器
always@(posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0) 
        cnt_1s <= 10'd0;
    else if((cnt_1us == CNT_1US_MAX)&&(cnt_1ms == CNT_1MS_MAX)&&(cnt_1s == CNT_1S_MAX))
        cnt_1s <= 10'd0;
    else if ((cnt_1us == CNT_1US_MAX)&&(cnt_1ms == CNT_1MS_MAX))
        cnt_1s <= cnt_1s + 10'd1;
    else
        cnt_1s <= cnt_1s; 
//使能信号
always@(posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0) 
        cnt_en <= 1'b0;
    else if ((cnt_1us == CNT_1US_MAX)&&(cnt_1ms == CNT_1MS_MAX)&&(cnt_1s == CNT_1S_MAX))
        cnt_en <= ~cnt_en;
    else 
        cnt_en <= cnt_en;
    
always@(posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0) 
        led_out <= 1'b1;
    else if(((cnt_en == 1'b0)&&(cnt_1ms <= cnt_1s))||((cnt_en == 1'b1)&&(cnt_1ms > cnt_1s)))
        led_out <= 1'b0;
    else 
        led_out <= 1'b1;
        
endmodule
        

`timescale 1ns/1ns
module tb_breath_led();
 
reg sys_clk;
reg sys_rst_n;


wire led_out;

initial
    begin
        sys_clk <= 1'b1;
        sys_rst_n <= 1'b0;
        #20
        sys_rst_n <= 1'b1;
        
    end

always #10 sys_clk = ~sys_clk;

 breath_led
#(
    .  CNT_1S_MAX (10'd9 )  ,
    . CNT_1MS_MAX (10'd9)  ,
    . CNT_1US_MAX (6'd4 )   

)
breath_led_inst
(
    .sys_clk    (sys_clk  )  ,
    .sys_rst_n  (sys_rst_n )  ,
   
    .led_out    (led_out )
);            

endmodule

 

ms计数器

 

s计数器

 

led_out