Matlab和FPGA联合设计中参考

clc;
clear all;

fid = fopen('F:\LiuHengQuan\ProgramData\Xilinx\Vivado\FFT_test\Data_Rout.txt', 'r+');
if fid == -1
    disp('fopen failed');
else
    ReadData = textscan(fid,'%s');
end
fclose(fid);
for i=1:length(ReadData{1})
    data(i) = hex2dec(ReadData{1}{i});
end
data_b = dec2hex(data);

fid2 = fopen('F:\LiuHengQuan\ProgramData\Xilinx\Vivado\FFT_test\Data_Lout.txt', 'r+');
if fid2 == -1
    disp('fopen failed');
else
    ReadData2 = textscan(fid2,'%s');
end
fclose(fid2);
for i=1:length(ReadData2{1})
    data2(i) = hex2dec(ReadData2{1}{i});
end
data_b2 = dec2hex(data2);


% 根据数据位宽，将无符号的数据转换为有符号数据（无符号数据不需要此操作）
for i=1:length(data_b)
    if(data(i) > 2^20/2-1)%8位宽的数据有符号数据取值范围[-128,127],(2^8/2-1=127),根据实际位宽修改
        data_R(i) = data(i) - 2^20;
    else
        data_R(i) = data(i);
    end
end

for i=1:length(data_b)
    if(data2(i) > 2^20/2-1)%8位宽的数据有符号数据取值范围[-128,127],(2^8/2-1=127),根据实际位宽修改
        data_L(i) = data2(i) - 2^20;
    else
        data_L(i) = data2(i);
    end
end

data_R1 = data_R(1:1000);
data_L1 = data_L(1:1000);

data_F = data_R1 + data_L1.*1i;  
data_F2 = abs(data_F);
figure
plot(data_F2);
fid3 = fopen('F:\LiuHengQuan\ProgramData\Xilinx\Vivado\FFT_test\Data_test.txt', 'r+');
if fid3 == -1
    disp('fopen failed');
else
    ReadDataTest = textscan(fid3,'%s');
end
fclose(fid3);
for i=1:length(ReadDataTest{1})
    data3(i) = bin2dec(ReadDataTest{1}{i});
end
data_FM = fft(data3,1000);

aa = abs(data_FM);
figure
plot(aa)
for i = 1:length(data_FM)
    x(i) = real(data_FM(i));
    y(i) = imag(data_FM(i));
end

如何将实数变为虚数，i前面必须有1，否则不正确

data_F = data_R1 + data_L1.*1i;